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ES9822PRO 数据表(PDF) 74 Page - ESS Technology,Inc |
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ES9822PRO 数据表(HTML) 74 Page - ESS Technology,Inc |
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74 / 126 page  0.3 ES9822 PRO Product Datasheet ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 74 Register 69: ADC CH2B CONFIG 1 Bits [7:4] [3] [2] [1] [0] Default 4'd0 1'b0 1'b0 1'b0 1'b0 Bits Mnemonic Description [7:4] ADC_INT_SEL_CH2B ADC Integrator Control • Program to 4'b1011 for optimum performance [3] ADC_EN_FB_CH2B Enable ADC 2B feedback path, active high • 1'b0: Disabled (default) • 1'b1: Enabled [2] RESERVED NA [1] ADC_EN_INT_CH2B Enable for INT for Channel 2B. Default is 0, INT is not enabled. • Set to 1'b1 to enable. [0] ADC_EN_CH2B Enable for Comparator and logic for Channel 2B. Default is 0, Comparator and logic are not enabled • Set to 1'b1 to enable. Register 70: ADC CH2B CONFIG 2 Bits [7:5] [4:3] [2] [1] [0] Default 3'd0 2'd0 1'b0 1'b0 1'b0 Bits Mnemonic Description [7:5] ADC_COMP_SEL_CH2B Sets the gain of Comparator of Channel 2B. • Program to 3'b001 for optimum performance [4:3] ADC_SUM_SEL_CH2B Sets the bandwidth of the summing amplifier for Channel 2B. • Program to 2'b11 for optimum performance [2] ADC_USE_DITHER_EXT_CH2B Enable the external dither for Channel 2B. • Default value is 0. [1] ADC_USE_DITHER_CH2B Enable the dither for Channel 2B. • Default value is 0, dither is not enabled [0] ADC_USE_STATE_CH2B Use state as logic output for Channel 2B. • Program to 1'b1 for optimum performance |
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