数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

ES9822PRO 数据表(PDF) 88 Page - ESS Technology,Inc

部件名 ES9822PRO
功能描述  32-bit High-Performance 2-Channel ADC
PDF  126 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ESS [ESS Technology,Inc]
网页  http://www.esstech.com
标志 ESS - ESS Technology,Inc

ES9822PRO 数据表(HTML) 88 Page - ESS Technology,Inc

Back Button ES9822PRO Datasheet HTML 84Page - ESS Technology,Inc ES9822PRO Datasheet HTML 85Page - ESS Technology,Inc ES9822PRO Datasheet HTML 86Page - ESS Technology,Inc ES9822PRO Datasheet HTML 87Page - ESS Technology,Inc ES9822PRO Datasheet HTML 88Page - ESS Technology,Inc ES9822PRO Datasheet HTML 89Page - ESS Technology,Inc ES9822PRO Datasheet HTML 90Page - ESS Technology,Inc ES9822PRO Datasheet HTML 91Page - ESS Technology,Inc ES9822PRO Datasheet HTML 92Page - ESS Technology,Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 88 / 126 page
background image
0.3
ES9822 PRO Product Datasheet
ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM
88
Register 94-93: PWM1 FREQUENCY
Bits
[15:0]
Default
16'd0
Bits
Mnemonic
Description
[15:0]
PWM1_FREQ
16-bit value to set the frequency of the PWM signal in terms
of SYS_CLK divisions.
Valid from 16'h0000 to 16'hFFFF
frequency (Hz)=SYS_CLK/(PWM1_FREQ+1)
Duty Cycle (%) = (1-(PWM1_FREQ+1-
PWM1_COUNT)/(PWM1_FREQ+1)) =
(PWM1_COUNT/(PWM1_FREQ+1))*100
Register 95: PWM2 COUNT
Bits
[7:0]
Default
8'd0
Bits
Mnemonic
Description
[7:0]
PWM2_COUNT
8-bit value to set the number of SYS_CLK periods the PWM
signal is high for.
Valid from 8'd0 to 8'd255
Register 97-96: PWM2 FREQUENCY
Bits
[15:0]
Default
16'd0
Bits
Mnemonic
Description
[15:0]
PWM2_FREQ
16-bit value to set the frequency of the PWM signal in terms
of SYS_CLK divisions.
Valid from 16'h0000 to 16'hFFFF
frequency (Hz)=SYS_CLK/(PWM2_FREQ+1)
Duty Cycle (%) = (1-(PWM2_FREQ+1-
PWM2_COUNT)/(PWM2_FREQ+1)) =
(PWM2_COUNT/(PWM2_FREQ+1))*100
Register 98: PWM3 COUNT
Bits
[7:0]
Default
8'd0
Bits
Mnemonic
Description
[7:0]
PWM3_COUNT
8-bit value to set the number of SYS_CLK periods the PWM
signal is high for.
Valid from 8'd0 to 8'd255
Register 100-99: PWM3 FREQUENCY



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com