DATA SHEET

Publication# 25692 Revision: A Amendment: 2

Issue Date: May 8, 2006

Am29BDS643G

64 Megabit (4 M x 16-Bit)

CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory

DISTINCTIVE CHARACTERISTICS

■ Single 1.8 volt read, program and erase (1.7 to

1.9 volt)

■ Multiplexed Data and Address for reduced I/O

count

— A0–A15 multiplexed as D0–D15

— Addresses are latched by AVD# control input

when CE# low

■ Simultaneous Read/Write operation

— Data can be continuously read from one bank

while executing erase/program functions in other

bank

— Zero latency between read and write operations

■ Read access times at 66/54/40 MHz

— Burst access times of 11/13.5/20 ns @ 30 pF

at industrial temperature range

— Asynchronous random access times

of 55/70/70 ns @ 30 pF

— Synchronous random access times

of 71/87.5/95 ns @ 30 pF

■ Burst length

— Continuous linear burst

— 8/16/32 word linear burst with wrap around

■ Power dissipation (typical values, 8 bits

— Burst Mode Read: 25 mA

— Simultaneous Operation: 40 mA

— Program/Erase: 15 mA

— Standby mode: 0.2 µA

■ Sector Architecture

— Eight 8 Kword sectors and one hundred

twenty-six 32 Kword sectors

— Banks A and B each contain four 8 Kword

sectors and thirty-one 32 Kword sectors; Banks

C and D each contain thirty-two 32 Kword

sectors

■ Sector Protection

— Software command sector locking

— WP# protects the last two boot sectors

■ Handshaking feature

— Provides host system with minimum possible

latency by monitoring RDY

■ Supports Common Flash Memory

Interface (CFI)

■ Software command set compatible with JEDEC

42.4 standards

— Backwards compatible with Am29F and Am29LV

families

■ Manufactured on 0.17 µm process technology

■ Minimum 1 million erase cycle guarantee

per sector

■ 20-year data retention at 125°C

— Reliable operation for the life of the system

■ Embedded Algorithms

— Embedded Erase algorithm automatically

preprograms and erases the entire chip or any

combination of designated sectors

— Embedded Program algorithm automatically

writes and verifies data at specified addresses

■ Data# Polling and toggle bits

— Provides a software method of detecting

program and erase operation completion

■ Erase Suspend/Resume

— Suspends an erase operation to read data from,

or program data to, a sector that is not being

erased, then resumes the erase operation

■ Hardware reset input (RESET#)

— Hardware method to reset the device for reading

array data

■ CMOS compatible inputs and outputs

■ Package

— 44-ball Very Thin FBGA

This product has been retired and is not recommended for designs. For new designs, S29NS064J supersedes Am29BDS643G. Please refer to the S29NS-J family data sheet for specifi-

cations and ordering information. Availability of this document is retained for reference and historical purposes only.