AM29LV640MT110REF datasheet(43/66 Pages) AMD

43 / 66 page

February 1, 2007 26190C8

Am29LV640MT/B

D A TA

SH EET

other system tasks. In this case, the system must start

at the beginning of the algorithm when it returns to de-

termine the status of the operation (top of Figure 9).

DQ5: Exceeded Timing Limits

DQ5 indicates whether the program, erase, or

write-to-buffer time has exceeded a specified internal

pulse count limit. Under these conditions DQ5 produces a

“1,” indicating that the program or erase cycle was not suc-

cessfully completed.

The device might output a “1” on DQ5 if the system

tries to program a “1” to a location that was previously

programmed to “0.” Only an erase operation can

change a “0” back to a “1.” Under this condition, the

device halts the operation, and when the timing limit

has been exceeded, DQ5 produces a “1.”

In all these cases, the system must write the reset

command to return the device to the reading the array

(or to erase-suspend-read if the device was previously

in the erase-suspend-program mode).

DQ3: Sector Erase Timer

After writing a sector erase command sequence, the

system can read DQ3 to determine whether or not

erasure has begun. (The sector erase timer does not

apply to the chip erase command.) If additional

sectors are selected for erasure, the entire time-out

also applies after each additional sector erase com-

mand. When the time-out period is complete, DQ3

switches from a “0” to a “1.” If the time between addi-

tional sector erase commands from the system can be

assumed to be less than 50 µs, the system need not

monitor DQ3. See also Sector Erase Command Se-

quence on page 33 .

After the sector erase command is written, the system

should read the status of DQ7 (Data# Polling) or DQ6

(Toggle Bit I) to ensure that the device has accepted

the command sequence, and then read DQ3. If DQ3 is

“1,” the Embedded Erase algorithm has begun; all fur-

ther commands (except Erase Suspend) are ignored

until the erase operation is complete. If DQ3 is “0,” the

device accepts additional sector erase commands. To

ensure the command has been accepted, the system

software should check the status of DQ3 prior to and

following each subsequent sector erase command. If

DQ3 is high on the second status check, the last com-

mand might not have been accepted.

Table 14 shows the status of DQ3 relative to the other

status bits.

DQ1: Write-to-Buffer Abort

DQ1 indicates whether a Write-to-Buffer operation

was aborted. Under these conditions DQ1 produces a

“1”.

The

system

m u st

i s s u e

the

Write-to-Buffer-Abort-Reset command sequence to re-

turn the device to reading array data. See Write Buffer

Programming on page 29 for more details.

Table 14.

Write Operation Status

Notes:

1. DQ5 switches to ‘1’ when an Embedded Program, Embedded Erase, or Write-to-Buffer operation has exceeded the

maximum timing limits. See DQ5: Exceeded Timing Limits for more information.

2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details.

3. The Data# Polling algorithm should be used to monitor the last loaded write-buffer address location.

4. DQ1 switches to ‘1’ when the device has aborted the write-to-buffer operation.

Status

DQ7

(Note 2)

DQ6

DQ5

(Note 1)

DQ3

DQ2

(Note 2)

DQ1

RY/BY#

Standard

Mode

Embedded Program Algorithm

DQ7#

Toggle

N/A

No toggle

Embedded Erase Algorithm

Toggle

N/A

Program

Suspend

Mode

Program-

Suspend

Read

Program-Suspended

Sector

Invalid (not allowed)

Non-Program

Suspended Sector

Data

Erase

Suspend

Mode

Erase-

Suspend

Read

Erase-Suspended

Sector

No toggle

N/A

Toggle

N/A

Non-Erase Suspended

Sector

Data

Erase-Suspend-Program

(Embedded Program)

DQ7#

Toggle

N/A

Write-to-

Buffer

Busy (Note 3)

DQ7#

Toggle

N/A

Abort (Note 4)

DQ7#

Toggle

N/A

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