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Am29SL400C

Am29SL400C_00_A6 January 23, 2007

D A TA

SH EE T

ERASE AND PROGRAMMING PERFORMANCE

Notes:

1.

Typical program and erase times assume the following conditions: 25

checkerboard pattern.

2.

3.

The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes program faster than

the maximum program times listed.

4.

In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5.

System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 5 on page 18

for further information on command definitions.

6.

The device has a minimum guaranteed erase and program cycle endurance of 1,000,000 cycles.

Parameter

Typ (Note 1)

Max (Note 2)

Unit

Comments

Sector Erase Time

2

15

s

Excludes 00h programming prior to

erasure (Note 4)

Chip Erase Time

38

s

Byte Programming Time

10

300

µs

Excludes system level overhead

(Note 5)

Word Programming Time

12

360

µs

Chip Programming Time

(Note 3)

Byte Mode

5

40

s

Word Mode

3.5

30

s