January 23, 2007 Am29SL400C_00_A6

Am29SL400C

9

D A TA

SH EE T

DEVICE BUS OPERATIONS

This section describes the requirements and use of the de-

vice bus operations, which are initiated through the internal

command register. The command register itself does not oc-

cupy any addressable memory location. The register is com-

posed of latches that store the commands, along with the

address and data information needed to execute the com-

mand. The contents of the register serve as inputs to the in-

ternal state machine. The state machine outputs dictate the

function of the device. Table 1 lists the device bus opera-

tions, the inputs and control levels they require, and the re-

sulting output. The following subsections describe each of

these operations in further detail.

Table 1.

Am29SL400C Device Bus Operations

Legend:

Notes:

1.

2.

The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector

Protection/Unprotection” section.

Word/Byte Configuration

The BYTE# pin controls whether the device data I/O pins

DQ15–DQ0 operate in the byte or word configuration. If the

BYTE# pin is set at logic ‘1’, the device is in word configura-

tion, DQ15–DQ0 are active and controlled by CE# and OE#.

If the BYTE# pin is set at logic ‘0’, the device is in byte con-

figuration, and only data I/O pins DQ0–DQ7 are active and

controlled by CE# and OE#. The data I/O pins DQ8–DQ14

are tri-stated, and the DQ15 pin is used as an input for the

LSB (A-1) address function.

Requirements for Reading Array Data

To read array data from the outputs, the system must drive

selects the device. OE# is the output control and gates array

BYTE# pin determines whether the device outputs array

data in words or bytes.

The internal state machine is set for reading array data upon

device power-up, or after a hardware reset. This ensures

that no spurious alteration of the memory content occurs

during the power transition. No command is necessary in

this mode to obtain array data. Standard microprocessor

read cycles that assert valid addresses on the device ad-

dress inputs produce valid data on the device data outputs.

The device remains enabled for read access until the com-

mand register contents are altered.

See Reading Array Data‚ on page 15 for more information.

Refer to the AC Read Operations table for timing specifica-

tions and to Figure 14‚ on page 28 for the timing diagram.

current specification for reading array data.

Writing Commands/Command Sequences

To write a command or command sequence (which includes

programming data to the device and erasing sectors of

For program operations, the BYTE# pin determines whether

the device accepts program data in bytes or words. Refer

to Word/Byte Configuration‚ on page 9 for more information.

Operation

CE#

OE#

WE#

RESET#

Addresses

(Note 1)

DQ0–

DQ7

DQ8–DQ15

BYTE#

BYTE#

Read

L

L

H

H

DQ8–DQ14 = High-Z,

DQ15 = A-1

Write

L

H

L

H

Standby

0.2 V

XX

0.2 V

X

High-Z

High-Z

High-Z

Output Disable

L

H

H

H

X

High-Z

High-Z

High-Z

Reset

X

X

X

L

X

High-Z

High-Z

High-Z

Sector Protect (Note 2)

L

H

L

Sector Address, A6

= L, A1 = H,

A0 = L

XX

Sector Unprotect (Note 2)

L

H

L

Sector Address, A6

= H, A1 = H,

A0 = L

XX

Temporary Sector Unprotect

X

X

X

High-Z