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AS7341

Datasheet

• PUBLIC

DS000504

• v3-00 • 2020-Jun-25

│ 41

REVID Register (Address 0x91)

Figure 55:

REVID Register

Addr: 0x91

REVID

Bit

Bit Name

Default

Access

Bit Description

7:3

reserved

2:0

REV_ID

000

Revision number identification

ID Register (Address 0x92)

Figure 56:

ID Register

Addr: 0x92

Bit

Bit Name

Default

Access

Bit Description

7:2

001001

Part number Identification

Value 001001

1:0

reserved

10.2.5

Spectral Interrupt Configuration

The spectral interrupt threshold registers provide 16-bit values to be used as the high and low

thresholds for comparison to the 16-bit CH0_DATA values (ADC CH0). If SP_IEN (register 0xF9) is

enabled and CH0_DATA is not between the two thresholds for the number of consecutive

measurements specified in APERS (register 0xBD) an interrupt is set.

SP_TH_L_LSB Register (Address 0x84)

Figure 57:

SP_TH_L_LSB Register

Addr: 0x84

SP_TH_L_LSB

Bit

Bit Name

Default

Access

Bit Description

7:0

SP_TH_L_LSB

0x00

Spectral low threshold LSB

This register provides the low byte of the low

interrupt threshold (CH0).

AS7341 数据表(PDF) 42 Page - OSRAM GmbH

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