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AS7341 数据表(PDF) 53 Page - OSRAM GmbH |
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AS7341 数据表(HTML) 53 Page - OSRAM GmbH |
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53 / 69 page ![]() Document Feedback AS7341 Register Description Datasheet • PUBLIC DS000504 • v3-00 • 2020-Jun-25 68 │ 52 Figure 79: CH4_DATA_H Register Addr: 0x9E CH4_DATA_H Bit Bit Name Default Access Bit Description 7:0 CH4_DATA_H 0 R CH4 ADC data – high byte CH5_DATA Register (Address 0x9F/0xA0) Figure 80: CH5_DATA_L Register Addr: 0x9F CH5_DATA_L Bit Bit Name Default Access Bit Description 7:0 CH5_DATA_L 0 R CH5 ADC data – low byte Figure 81: CH5_DATA_H Register Addr: 0xA0 CH5_DATA_H Bit Bit Name Default Access Bit Description 7:0 CH5_DATA_H 0 R CH5 ADC data – high byte 10.2.8 Miscellaneous Configuration CFG0 Register (Address 0xA9) Figure 82: CFG 0 Register Addr: 0xA9 CFG0 Bit Bit Name Default Access Bit Description 7:6 reserved 0 reserved 5 LOW_POWER 0 RW Low Power Idle. When asserted, the device will automatically run in a low power mode whenever all functions are in wait states or disabled. |
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