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AS7341 数据表(PDF) 55 Page - OSRAM GmbH |
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AS7341 数据表(HTML) 55 Page - OSRAM GmbH |
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55 / 69 page ![]() Document Feedback AS7341 Register Description Datasheet • PUBLIC DS000504 • v3-00 • 2020-Jun-25 68 │ 54 CFG6 Register (Address 0xAF) Figure 84: CFG 6 Register Addr: 0xAF CFG6 Bit Bit Name Default Access Bit Description 4:3 SMUX_CMD 2 RW SMUX command. Selects the SMUX command to execute when setting SMUXEN gets set. Do not change during ongoing SMUX operation. VALUE SMUX_CMD 0 ROM code initialization of SMUX 1 Read SMUX configuration to RAM from SMUX chain 2 Write SMUX configuration from RAM to SMUX chain 3 Reserved, do not use CFG9 Register (Address 0xB2) Figure 85: CFG 9 Register Addr: 0xB2 CFG9 Bit Bit Name Default Access Bit Description 7 reserved 0 reserved 6 SIEN_FD 0 RW System Interrupt Flicker Detection. Enables system interrupt when flicker detection status change has occurred. 5 reserved reserved 4 SIEN_SMUX 0 RW System Interrupt SMUX Operation. Enables system interrupt when SMUX command has finished 3:0 reserved reserved |
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