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TSL2521 数据表(PDF) 20 Page - OSRAM GmbH |
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TSL2521 数据表(HTML) 20 Page - OSRAM GmbH |
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20 / 81 page  Datasheet, Public Page 19 [v3-00] 2022-Dec-21 Document Feedback TSL2521 − Register Overview 0xD1 MEAS_SEQR_APERS_AND_VSYNC_ WAIT Defines the measurement sequencer pattern 0x01 0xD2 MEAS_SEQR_RESIDUAL_0 Residual measurement configuration with sequencer on modulator0 and modulator1 0xFF 0xD3 MEAS_SEQR_RESIDUAL_1_AND_ WAIT Wait time configuration for all sequencers 0x1F 0xD4 MEAS_SEQR_STEP0_MOD_GAINX_L Gain of modulator0 and modulator1 for sequencer step 0 0x88 0xD6 MEAS_SEQR_STEP1_MOD_GAINX_L Gain of modulator0 and modulator1 for sequencer step 1 0x88 0xD8 MEAS_SEQR_STEP2_MOD_GAINX_L Gain of modulator0 and modulator1 for sequencer step 2 0x88 0xDA MEAS_SEQR_STEP3_MOD_GAINX_L Gain of modulator0 and modulator1 for sequencer step 3 0x88 0xDC MEAS_SEQR_STEP0_MOD_PHDX_ SMUX_L Photodiode 0-3 to modulator mapping through multiplexer for sequencer step 0 0x66 0xDD MEAS_SEQR_STEP0_MOD_PHDX_ SMUX_H Photodiode 4-5 to modulator mapping through multiplexer for sequencer step 0 0x06 0xDE MEAS_SEQR_STEP1_MOD_PHDX_ SMUX_L Photodiode 0-3 to modulator mapping through multiplexer for sequencer step 1 0x84 0xDF MEAS_SEQR_STEP1_MOD_PHDX_ SMUX_H Photodiode 4-5 to modulator mapping through multiplexer for sequencer step 1 0xF3 0xE0 MEAS_SEQR_STEP2_MOD_PHDX_ SMUX_L Photodiode 0-3 to modulator mapping through multiplexer for sequencer step 2 0x07 0xE1 MEAS_SEQR_STEP2_MOD_PHDX_ SMUX_H Photodiode 4-5 to modulator mapping through multiplexer for sequencer step 2 0xF8 0xE2 MEAS_SEQR_STEP3_MOD_PHDX_ SMUX_L Photodiode 0-3 to modulator mapping through multiplexer for sequencer step 3 0x24 0xE3 MEAS_SEQR_STEP3_MOD_PHDX_ SMUX_H Photodiode 4-5 to modulator mapping through multiplexer for sequencer step 3 0x03 0xE4 MOD_CALIB_CFG0 Modulator calibration config0 0xFF 0xE6 MOD_CALIB_CFG2 Modulator calibration config2 0xD3 0xF2 VSYNC_PERIOD[7:0] Measured VSYNC period 0x00 0xF3 VSYNC_PERIOD[15:8] Read and clear measured VSYNC period 0x00 0xF4 VSYNC_PERIOD_TARGET[7:0] Targeted VSYNC period 0x00 0xF5 VSYNC_PERIOD_TARGET[14:8] Alternative target VSYNC period 0x00 0xF6 VSYNC_CONTROL Control of VSYNC period 0x00 Addr Name Description Reset |
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