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TSL2521 数据表(PDF) 41 Page - OSRAM GmbH |
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TSL2521 数据表(HTML) 41 Page - OSRAM GmbH |
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41 / 81 page  Page 40 Datasheet, Public Document Feedback [v3-00] 2022-Dec-21 TSL2521 − Register O ver view CFG7 Register Figure 47: CFG7 Note(s): 1. Return to the Register Map (0xA8). CFG8 Register Figure 48: CFG8 Note(s): 1. Return to the Register Map (0xA9). CFG9 Register Figure 49: CFG9 Note(s): 1. Return to the Register Map (0xAA). Addr: 0xA8 CFG7 Bit Field Reset Type Bit Description 7:0 Reserved 0x01 Addr: 0xA9 CFG8 Bit Field Reset Type Bit Description 7:4 MEASUREMENT_SEQUENCER_ MAX_MOD_GAIN 0xC R/W Sets the maximum gain for all channels in all sequencer steps. 3:0 MEASUREMENT_SEQUENCER_ AGC_PREDICT_MOD_GAIN_ REDUCTION 0x4 R/W Sets the modulator gain reduction in AGC predict mode. All channels in the actual measurement sequence are reduced by the programmed gain reduction before gain prediction starts. Addr: 0xAA CFG9 Bit Field Reset Type Bit Description 7:2 Reserved 0 1:0 MOD_RESIDUAL_ BITS_IGNORE 0R/W Sets the number of residual bits ignored and shifted in flicker data. Please observe to set MOD_FD_FIFO_ DATAx_WIDTH accordingly. |
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