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TSL2521 数据表(PDF) 44 Page - OSRAM GmbH |
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TSL2521 数据表(HTML) 44 Page - OSRAM GmbH |
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44 / 81 page ![]() Datasheet, Public Page 43 [v3-00] 2022-Dec-21 Document Feedback TSL2521 − Register Overview INTENAB Register Figure 53: INTENAB Note(s): 1. Return to the Register Map (0xBA). Addr: 0xBA INTENAB Bit Field Reset Type Bit Description 7MIEN 0 R/W Modulator Interrupt Enable. Setting this bit will allow a modulator interrupt on the external INT pin. Please check in STATUS2 for the reason of the interrupt. 6:4 Reserved 0 3AIEN 0 R/W ALS Interrupt Enable. Setting this bit will allow an ALS interrupt on the external INT pin. Please check in STATUS3 for the reason of the interrupt. 2 FIEN 0 FIFO Interrupt Enable. Setting this bit will allow a FIFO interrupt on the external INT pin. Check FINT for further information. 1Reserved 0 0 SIEN 0 R/W System Interrupt Enable. Setting this bit will allow a system interrupt on the external INT pin. Please check in STATUS3 for the reason of the interrupt. |
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