数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

TSL2521 数据表(PDF) 35 Page - OSRAM GmbH

部件名 TSL2521
功能描述  Highly Sensitive Ambient Light Sensor with Selective Flicker Detection and Fast Sampling for Brightness Control or Auxiliary to Camera
PDF  81 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  OSRAM [OSRAM GmbH]
网页  http://www.osram.com
标志 OSRAM - OSRAM GmbH

TSL2521 数据表(HTML) 35 Page - OSRAM GmbH

Back Button TSL2521 Datasheet HTML 31Page - OSRAM GmbH TSL2521 Datasheet HTML 32Page - OSRAM GmbH TSL2521 Datasheet HTML 33Page - OSRAM GmbH TSL2521 Datasheet HTML 34Page - OSRAM GmbH TSL2521 Datasheet HTML 35Page - OSRAM GmbH TSL2521 Datasheet HTML 36Page - OSRAM GmbH TSL2521 Datasheet HTML 37Page - OSRAM GmbH TSL2521 Datasheet HTML 38Page - OSRAM GmbH TSL2521 Datasheet HTML 39Page - OSRAM GmbH Next Button
Zoom Inzoom in Zoom Outzoom out
 35 / 81 page
background image
Page 34
Datasheet, Public
Document Feedback
[v3-00] 2022-Dec-21
TSL2521 − Register O ver view
Note(s):
1. Return to the Register Map (0xA0).
CFG0 Register
Figure 40:
CFG0
Note(s):
1. Return to the Register Map (0xA1).
CFG1 Register
Figure 41:
CFG1
0SINT_VSYNC
0
R/W
Indicates that SYNCH_LOST is set or reset. SYNCH_LOST
gets set if the waiting timeout for VSYNC_TIMEOUT is
reached. In parallel SIEN_VSYNC must be set. Writing ‘1’
to this bit clears this interrupt
Addr: 0xA1
CFG0
Bit
Field
Reset
Type
Bit Description
7Reserved
0
6SAI
0
R/W
Sleep After Interrupt. If asserted, the oscillator is turned
off whenever interrupt is active (low). SAI_ ACTIVE is set
in this event. To activate the oscillator again, service and
clear all interrupts plus clear the SAI_ACTIVE bit by
writing “1” to CLEAR_SAI_ACTIVE. Sleep after interrupt
is asserted only in combination with MEASUREMENT_
SEQUENCER_SINT_PER_STEP or SIEN or SIEN_
MEASUREMENT_SEQUENCER
5LOWPOWER_IDLE
0R/W
Low Power Idle. When asserted, the device will
automatically run in a low power mode whenever all
functions are in wait states or disabled.
4:0
Reserved
01000b
R
Do not overwrite default.
Addr: 0xA2
CFG1
Bit
Field
Reset
Type
Bit Description
7:3
Reserved
0
Addr: 0xA0
STATUS5
Bit
Field
Reset
Type
Bit Description



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com