TSL25413 datasheet(9/39 Pages) OSRAM

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[v2-00] 2023-Mar-10

TSL2541 − Detailed Description

Ambient Light Sensing

The ALS reception signal path begins as photodiodes receive

filtered light and ends with the 16-bit results in the VISDATAL/H

and IRDATAL/H registers. The visible channel's photodiode is

filtered with a UV and IR filter to receive only visible light. The

IR channel's photodiode is filtered to receive only IR. Signals

from the photodiodes simultaneously accumulate for a period

of time set by the value in ATIME before the results are available.

Gain is adjustable from 1x to 128x to facilitate operation over a

wide range of lighting conditions. Custom Lux equations can

be created for specific applications and system designs.

I²C Characteristics

The device uses I²C serial communication protocol for

communication. The device supports 7-bit chip addressing and

both standard and fast clock frequency modes with a chip

address of 0x39. Read and Write transactions comply with the

standard set by Philips (now NXP).

Internal to the device, an 8-bit buffer stores the register address

location of the desired byte to read or write. This buffer

auto-increments upon each byte transfer and is retained

between transaction events (i.e. valid even after the master

issues a STOP command and the I²C bus is released).

During consecutive Read transactions, the future/repeated I²C

Read transaction may omit the memory address byte normally

following the chip address byte; the buffer retains the last

I²C Write Transaction

A Write transaction consists of a START, CHIP-ADDRESSWRITE,

byte (9TH clock pulse) the slave places an ACKNOWLEDGE/

NOT-ACKNOWLEDGE (ACK/NACK) on the bus. If NACK is

transmitted by the slave, the master may issue a STOP.

I²C Read Transaction

A Read transaction consists of a START, CHIP-ADDRESSWRITE,

and STOP. Following all but the final byte the master places an

ACK on the bus (9TH clock pulse). Termination of the Read

transaction is indicated by a NACK being placed on the bus by

the master, followed by STOP.

Alternately, if the previous I²C transaction was a Read, the

internal register address buffer is still valid, allowing the

transaction to proceed without “re”-specifying the register

address. In this case the transaction consists of a START,

CHIP-ADDRESSREAD, DATA BYTE(S), and STOP. Following all but

Detailed Description

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