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ams Datasheet

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[v1-00] 2016-Apr-05

TSL2580, TSL2581 − Register Set

Note(s):

1. An I²C block transaction will continue until the Master sends a stop condition. See Figure 24 and Figure 25. Unlike the I²C protocol,

the SMBus read/write protocol requires a Byte Count. All four ADC Channel Registers (14h through 17h) can be read simultaneously

in a single SMBus transaction. This is the only 32-bit data block supported by the TSL258x SMBus protocol. The TRANSACTION Field

Value must be set to 10b, and a read condition should be initiated with a COMMAND CODE of D3h. By using a COMMAND CODE of

D3h during an SMBus Block Read Protocol, the TSL258x device will automatically insert the appropriate Byte Count (Byte Count =

4) as illustrated in Figure 25. A write condition should not be used in conjunction with the 13h register.

2. Only the Send Byte Protocol should be used when clearing interrupts.

ADDRESS

4:0

Register Address/Special Function. This field selects the specific control or status

register for following write and read commands according to Figure 26. When the

TRANSACTION field is set to 11b, this field specifies a special command function as

outlined below.

FIELD VALUE

SPECIAL

FUNCTION

DESCRIPTION

00000

Reserved

Reserved. Write as 0000b.

00001

Interrupt clear

Clear any pending interrupt and is a

write−once−to−clear bit

00010

Stop manual

integration

When the Timing Register is set to 00h, a

SendByte command with the ADDRESS

field set to 0010b will stop a manual

integration. The actual length of the

integration cycle may be read in the

MANUAL INTEGRATION TIMER Register.

00011

Start manual

integration

When the Timing Register is set to 00h, a

SendByte command with the ADDRESS

field set to 0011b will start a manual

integration. The actual length of the

integration cycle may be read in the

MANUAL INTEGRATION TIMER Register.

x11xx

Reserved

Reserved. Write as 11xxb.

Field

Bits

Description