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ams Datasheet

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[v1-00] 2016-Apr-05

TSL2580, TSL2581 − Register Set

Interrupt Threshold Register (03h - 06h)

The interrupt threshold registers store the values to be used as

the high and low trigger points for the comparison function for

interrupt generation. If the value generated by channel 0

crosses below or is equal to the low threshold specified, an

interrupt is asserted on the interrupt pin. If the value generated

by channel 0 crosses above the high threshold specified, an

interrupt is asserted on the interrupt pin. Registers THLLOW and

THLHIGH provide the low byte and high byte, respectively, of

the lower interrupt threshold. Registers THHLOW and THHHIGH

provide the low and high bytes, respectively, of the upper

interrupt threshold. The high and low bytes from each set of

registers are combined to form a 16-bit threshold value. The

interrupt threshold registers default to 00h on power up.

Figure 33:

Interrupt Threshold Register

Note(s):

1. Since two 8-bit values are combined for a single 16-bit value for each of the high and low interrupt thresholds, the Send Byte protocol

should not be used to write to these registers. Any values transferred by the Send Byte protocol with the MSB set would be interpreted

as the COMMAND field and stored as an address for subsequent read/write operations and not as the interrupt threshold information

as desired. The Write Word protocol should be used to write byte-paired registers. For example, the THLLOW and THLHIGH registers

(as well as the THHLOW and THHHIGH registers) can be written together to set the 16-bit ADC value in a single transaction.

Register

Address

Bits

Description

THLLOW

3h

7:0

ADC channel 0 lower byte of the low threshold

THLHIGH

4h

7:0

ADC channel 0 upper byte of the low threshold

THHLOW

5h

7:0

ADC channel 0 lower byte of the high threshold

THHHIGH

6h

7:0

ADC channel 0 upper byte of the high threshold