Page 24

ams Datasheet

Document Feedback

[v1-00] 2016-Apr-05

TSL2580, TSL2581 − Register Set

Figure 30:

Interrupt Control Register

Note(s):

1. Use this bit to isolate a particular condition when the sensor is continuously integrating.

Figure 31:

Interrupt Control Select

Note(s):

1. Field value of 11 may be used to test interrupt connectivity in a system or to assist in debugging interrupt service routine software.

76

5

4

3

2

1

0

Resv

INTR_STOP

INTR

PERSIST

Field

Bits

Description

Resv

7

Reserved. Write as 0.

INTR_STOP

6

Stop ADC integration on interrupt. When high, ADC integration will stop

once an interrupt is asserted. To resume operation (1) de-assert ADC_EN

using CONTROL register, (2) clear interrupt using COMMAND register,

and (3) re-assert ADC_EN using CONTROL register. (1)

INTR

5:4

INTR Control Select. This field determines mode of interrupt logic

according to Figure 31, below.

PERSIST

3:0

Interrupt persistence. Controls rate of interrupts to the host processor as

shown in Figure 32, below.

Intr Field Value

Read Value

00

Interrupt output disabled

01

Level Interrupt

10

SMBAlert compliant

11

Test Mode: Sets interrupt and functions as mode 10