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MPC862 数据表(PDF) 62 Page - Freescale Semiconductor, Inc

部件名 MPC862
功能描述  PowerQUICC??Family Hardware Specifications
PDF  88 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC862 数据表(HTML) 62 Page - Freescale Semiconductor, Inc

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MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
62
Freescale Semiconductor
CPM Electrical Characteristics
Figure 62. Ethernet Transmit Timing Diagram
Figure 63. CAM Interface Receive Start Timing Diagram
Figure 64. CAM Interface REJECT Timing Diagram
TCLK1
128
TxD1
(Output)
128
TENA(RTS1)
(Input)
NOTES:
Transmit clock invert (TCI) bit in GSMR is set.
If RENA is deasserted before TENA, or RENA is not asserted at all during transmit, then the
CSL bit is set in the buffer descriptor at the end of the frame transmission.
1.
2.
RENA(CD1)
(Input)
133
134
132
131
121
129
(NOTE 2)
RCLK1
RxD1
(Input)
RSTRT
(Output)
0
136
125
1
1
BIT1
BIT2
Start Frame Delimiter
REJECT
137



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