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ST25R200 数据表(PDF) 5 Page - STMicroelectronics |
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ST25R200 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 88 page ![]() 2.1.2 Receiver The receiver detects card modulation superimposed on the 13.56 MHz carrier signal. The receiver chain incorporates several features that enable reliable operation in challenging and noisy conditions. The receiver is connected to the antenna via the pins RFI1 and RFI2. The output of the receiver is connected to the framing block that decodes the demodulated and digitized subcarrier signal. 2.1.3 Quartz crystal oscillator The quartz crystal oscillator operates with 27.12 MHz crystals. At startup, the transconductance of the oscillator is increased to achieve a fast startup. Since the startup time varies with crystal type, temperature and other parameters, the oscillator amplitude is observed, and an interrupt is sent when a stable oscillator operation is reached. 2.1.4 Power supply regulators Integrated power supply regulators ensure a high power supply rejection ratio for the complete reader system. Different voltage regulators supply separate blocks to decouple from noise sources. 2.1.5 POR and bias This block provides bias currents and reference voltages to all other blocks. It also incorporates a power-on reset (POR) circuit, which provides a reset at power-up and at low supply levels. 2.1.6 RC oscillator and wake-up timer The RC oscillator allows the wake-up timer to run and periodically trigger a measurement of its surroundings during wake-up mode. 2.1.7 Tx coding This block encodes the transmit frames according to the selected RF communication mode and bit rate. It generates the SOF (start of frame), EOF (end of frame), CRC, and parity bits automatically. The data to be transmitted is taken from the FIFO. 2.1.8 Rx framing This block decodes received frames according to the selected RF communication mode and bit rate. The SOF (start of frame), EOF (end of frame), CRC, and parity bits are automatically checked and removed by this block. The received data is then placed in the FIFO. 2.1.9 Control logic This block drives all activity of the device based on the commands received via the serial interface and the configurations present on the registers. 2.1.10 FIFO A 256-byte FIFO is available for exchanging data via the transmitter and receiver. Depending on the mode, it contains either data that has been received or data to be transmitted. 2.1.11 SPI A 4-wire serial peripheral interface (SPI) is available for communication between the device and the host/ microcontroller. ST25R200 Functional overview DS13658 - Rev 2 page 5/88 |
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