ST25R200 datasheet(17/88 Pages) STMICROELECTRONICS

17 / 88 page

Writing of data to addressable registers (write mode)

The following figures show cases of writing a single byte and writing multiple bytes with auto-incrementing

address. After the SPI operation direction bit, the address of the register to be written is provided. Then one or

more data bytes are transferred from the SPI, always from the MSB to the LSB. The data byte is written in the

before an 8-bit packet composing one byte is sent, the writing of this register is not performed. In case the register

on the defined address does not exist or it is a read only register no write is performed.

Figure 9. SPI communication: writing of single byte

SCLK rising

edge Data is

transfered

from µC

SCLK falling

edge Data is

sampled

Data is moved to

Address

BSS rising

edge signals

end of

WRITE Mode

‘0’ Write

BSS

SCLK

MOSI

Figure 10. SPI communication: writing of multiple bytes

BSS

SCLK

MOSI

Data is moved

to Address

<A6-A0> + n

BSS rising edge

signals end of

WRITE Mode

‘0’ Write

Data is moved

to Address

<A6-A0> + (n-1)

Data is moved

to Address

<A6-A0> + 1

Data is

moved to

Address

<A6-A0>

Reading of data from addressable registers (read mode)

After the SPI operation direction bit, the address of the register to be read has to be provided from the MSB to the

LSB. Then one or more data bytes are transferred to the MISO output, always from the MSB to the LSB.

Analogous to the write mode, also the read mode supports auto-incrementing address.

MOSI is sampled at the falling edge of SCLK (like shown in the following diagrams), data to be read from the

device internal register is driven to the MISO pin on the rising edge of SCLK and is sampled by the master at the

falling edge of SCLK.

In case the register on the defined address does not exist, all 0 data is sent to MISO.

ST25R200

Application information

DS13658 - Rev 2

page 17/88

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