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ST25R200 数据表(PDF) 76 Page - STMicroelectronics |
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ST25R200 数据表(HTML) 76 Page - STMicroelectronics |
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76 / 88 page  6.5 SPI interface characteristics Table 95. SPI interface characteristics(up to 10 MHz) Operation Symbol Parameter Conditions (1) Min Typ Max Unit General TSCLK SCLK period TSCLK=TSCLKL + TSCLKH 100 - - ns TSCLKL SCLK low - 45 - - TSCLKH SCLK high - 45 - - TSSH SPI reset (BSS high) - 100 - - TNCSL BSS falling to SCLK rising First SCLK pulse 25 - - TNCSH SCLK falling to BSS rising Last SCLK pulse 25 - - TDIS Data in setup time - 10 - - TDIH Data in hold time - 10 - - TDOD Data out delay Cload < 50 pF - 20 45 TDOHZ Data out to high impedance delay Cload < 50 pF - 20 - Read TDOD Data out delay Cload < 50 pF - 20 45 TDOHZ Data out to high impedance delay Cload < 50 pF - 20 - 1. Evaluated by characterization - not tested in production. Figure 21. SPI timing diagram - General operation ... ... ... DATAI DATAI DATAI ... tSCLKH tNCSL tSCLKL tDIS tDIH tNCSH BSS MOSI MISO SCLK Figure 22. SPI timing diagram - Read operation ... ... ... DATAI ... DATAO DATAO tDOD tDOHZ BSS MOSI MISO SCLK ST25R200 Electrical characteristics DS13658 - Rev 2 page 76/88 |
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