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DSPIC33FJ12MC02ESS 数据表(PDF) 146 Page - Microchip Technology |
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DSPIC33FJ12MC02ESS 数据表(HTML) 146 Page - Microchip Technology |
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146 / 284 page  dsPIC33FJ12MC201/202 DS70265B-page 144 Preliminary © 2007 Microchip Technology Inc. FIGURE 14-1: 6-CHANNEL PWM MODULE BLOCK DIAGRAM (PWM1) P1DC3 P1DC3 Buffer PWM1CON1 PWM1CON2 P1TPER Comparator Comparator Channel 3 Dead-Time Generator and P1TCON P1SECMP Comparator Special Event Trigger P1OVDCON PWM Enable and Mode SFRs PWM Manual Control SFR Channel 2 Dead-Time Generator and Channel 1 Dead-Time Generator and PWM Generator #2 PWM Generator #1 PWM Generator # 3 SEVTDIR PTDIR P1DTCON1 Dead-Time Control SFRs PWM1L1 PWM1H1 PWM1L2 PWM1H2 Note: Details of PWM Generator #1and #2 not shown for clarity. PWM1L3 PWM1H3 P1DTCON2 P1FLTACON Fault Pin Control SFRs PWM Time Base Output Driver Block FLTA1 Override Logic Override Logic Override Logic Special Event Postscaler P1TPER Buffer P1TMR |
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