数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

DSPIC33FJ12MC02ESS 数据表(PDF) 151 Page - Microchip Technology

部件名 DSPIC33FJ12MC02ESS
功能描述  High-Performance, 16-Bit Digital Signal Controllers
PDF  284 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

DSPIC33FJ12MC02ESS 数据表(HTML) 151 Page - Microchip Technology

Back Button DSPIC33FJ12MC02ESS Datasheet HTML 147Page - Microchip Technology DSPIC33FJ12MC02ESS Datasheet HTML 148Page - Microchip Technology DSPIC33FJ12MC02ESS Datasheet HTML 149Page - Microchip Technology DSPIC33FJ12MC02ESS Datasheet HTML 150Page - Microchip Technology DSPIC33FJ12MC02ESS Datasheet HTML 151Page - Microchip Technology DSPIC33FJ12MC02ESS Datasheet HTML 152Page - Microchip Technology DSPIC33FJ12MC02ESS Datasheet HTML 153Page - Microchip Technology DSPIC33FJ12MC02ESS Datasheet HTML 154Page - Microchip Technology DSPIC33FJ12MC02ESS Datasheet HTML 155Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 151 / 284 page
background image
© 2007 Microchip Technology Inc.
Preliminary
DS70265B-page 149
dsPIC33FJ12MC201/202
14.7.2
DUTY CYCLE IMMEDIATE UPDATES
When the Immediate Update Enable bit is set (IUE =
1), any write to the Duty Cycle registers updates the
new duty cycle value immediately. This feature gives
programmers the option to allow immediate updates of
the active PWM Duty Cycle registers instead of waiting
for the end of the current time base period. Duty cycle
update effects are as follows:
• If the PWM output is active at the time the new
duty cycle is written and the new duty cycle is less
than the current time base value, the PWM pulse
width will be shortened.
• If the PWM output is active at the time the new
duty cycle is written and the new duty cycle is
greater than the current time base value, the
PWM pulse width will be lengthened.
• If the PWM output is inactive at the time the new
duty cycle is written and the new duty cycle is
greater than the current time base value, the
PWM output will become active immediately and
will remain active for the new written duty cycle
value.
System stability is improved in closed-loop servo
applications by reducing the delay between system
observation and the issuance of system corrective
commands when immediate updates are enabled
(IUE = 1).
14.8
Complementary PWM Operation
In the Complementary mode of operation, each pair of
PWM outputs is obtained by a complementary PWM
signal. A dead time can be inserted during device
switching, when both outputs are inactive for a short
period
(refer
to
Section 14.9
“Dead-Time
Generators”).
In Complementary mode, the duty cycle comparison
units are assigned to the PWM outputs as follows:
• PxDC1 register controls PWM1H/PWM1L outputs
• PxDC2 register controls PWM2H/PWM2L outputs
• PxDC3 register controls PWM3H/PWM3L outputs
Complementary mode is selected for each PWM
I/O
pin pair by clearing the appropriate PMODx bit in the
PWMxCON1 SFR. The PWM I/O pins are set to
Complementary mode by default upon a device Reset.
14.9
Dead-Time Generators
Dead-time generation can be provided when any of
the
PWM
I/O
pin
pairs
are
operating
in
Complementary Output mode. The PWM outputs use
push-pull drive circuits. Power output devices cannot
switch instantaneously, so some amount of time must
be provided between the turn-off event of one PWM
output in a complementary pair and the turn-on event
of the other transistor.
The PWM module allows two different dead times to be
programmed. These two dead times can be used in
one of two methods to increase user flexibility:
• The PWM output signals can be optimized for
different turn-off times in the high side and low
side transistors in a complementary pair of tran-
sistors. The first dead time is inserted between
the turn-off event of the lower transistor of the
complementary pair and the turn-on event of the
upper transistor. The second dead time is inserted
between the turn-off event of the upper transistor
and the turn-on event of the lower transistor.
• The two dead times can be assigned to individual
PWM I/O pin pairs. This operating mode allows
the PWM module to drive different transistor/load
combinations with each complementary PWM I/O
pin pair.
14.9.1
DEAD-TIME GENERATORS
Each complementary output pair for the PWM module
has a 6-bit down counter that is used to produce the
dead-time insertion. As shown in Figure 14-5, each
dead-time unit has a rising and falling edge detector
connected to the duty cycle comparison output.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com