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PIC18F258-E/PSQTP 数据表(PDF) 37 Page - Microchip Technology |
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PIC18F258-E/PSQTP 数据表(HTML) 37 Page - Microchip Technology |
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37 / 402 page  © 2006 Microchip Technology Inc. DS41159E-page 35 PIC18FXX8 TXB0SIDH PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB0CON PIC18F2X8 PIC18F4X8 -000 0-00 -000 0-00 -uuu u-uu TXB1D7 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D6 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D5 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D4 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D3 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D2 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D1 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D0 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1DLC PIC18F2X8 PIC18F4X8 -x-- xxxx -u-- uuuu -u-- uuuu TXB1EIDL PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1EIDH PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1SIDL PIC18F2X8 PIC18F4X8 xxx- x-xx uuu- u-uu uuu- u-uu TXB1SIDH PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB1CON PIC18F2X8 PIC18F4X8 0000 0000 0000 0000 uuuu uuuu TXB2D7 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D6 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D5 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D4 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D3 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D2 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D1 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D0 PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2DLC PIC18F2X8 PIC18F4X8 -x-- xxxx -u-- uuuu -u-- uuuu TXB2EIDL PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2EIDH PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2SIDL PIC18F2X8 PIC18F4X8 xxx- x-xx uuu- u-uu uuu- u-uu TXB2SIDH PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TXB2CON PIC18F2X8 PIC18F4X8 -000 0-00 -000 0-00 -uuu u-uu RXM1EIDL PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu RXM1EIDH PIC18F2X8 PIC18F4X8 xxxx xxxx uuuu uuuu uuuu uuuu TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Reset WDT Reset RESET Instruction Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 4: See Table 3-2 for Reset value for specific condition. 5: Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other oscillator modes, they are disabled and read ‘0’. 6: Values for CANSTAT also apply to its other instances (CANSTATRO1 through CANSTATRO4). |
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