PIC18F258-ESLASHPSQTP datasheet(85/402 Pages) MICROCHIP

85 / 402 page

DS41159E-page 83

PIC18FXX8

PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2

U-0

R/W-0

U-0

R/W-0

—CMIF(1)

—

EEIF

BCLIF

LVDIF

TMR3IF

ECCP1IF(1)

bit 7

bit 0

bit 7

Unimplemented: Read as ‘0’

bit 6

CMIF: Comparator Interrupt Flag bit(1)

= Comparator input has changed

= Comparator input has not changed

bit 5

Unimplemented: Read as ‘0’

bit 4

EEIF: EEPROM Write Operation Interrupt Flag bit

= Write operation is complete (must be cleared in software)

= Write operation is not complete

bit 3

BCLIF: Bus Collision Interrupt Flag bit

= A bus collision occurred (must be cleared in software)

= No bus collision occurred

bit 2

LVDIF: Low-Voltage Detect Interrupt Flag bit

= A low-voltage condition occurred (must be cleared in software)

= The device voltage is above the Low-Voltage Detect trip point

bit 1

TMR3IF: TMR3 Overflow Interrupt Flag bit

= TMR3 register overflowed (must be cleared in software)

= TMR3 register did not overflow

bit 0

ECCP1IF: ECCP1 Interrupt Flag bit(1)

Capture mode:

= A TMR1 (TMR3) register capture occurred (must be cleared in software)

= No TMR1 (TMR3) register capture occurred

Compare mode:

= A TMR1 register compare match occurred (must be cleared in software)

= No TMR1 register compare match occurred

PWM mode:

Unused in this mode.

Note 1: This bit is only available on PIC18F4X8 devices. For PIC18F2X8 devices, this bit

is unimplemented and reads as ‘0’.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

PIC18F258-E/PSQTP 数据表(PDF) 85 Page - Microchip Technology

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