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STW5094AD 数据表(PDF) 27 Page - STMicroelectronics |
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STW5094AD 数据表(HTML) 27 Page - STMicroelectronics |
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27 / 51 page ![]() 27/51 STw5094A Figure 6. Audio interface (AU I/F) timing: DSP slave mode Figure 7. Audio interface (AU I/F) timing: I2S master mode tPLRCK tPSCK2 tHSCK tLSCK tSSDI tHSDI SDI SCK SCK When SCL=1 (*) LRCK When SCL=0 (*) (*) SCL is bit2 in CR16 tSLR tHLR tDLR 2 16 or 32 15 or 31 15 or 31 16 or 32 tSSDI tHSDI 1 1 2 SDI SCK SCK When SCL=1 (*) LRCK When SCL=0 (*) (*) SCL is bit2 in CR16 tDLR tPLRCK |
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