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CS4341 数据表(PDF) 10 Page - Cirrus Logic |
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CS4341 数据表(HTML) 10 Page - Cirrus Logic |
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10 / 34 page  CS4341 10 DS298F5 SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE Parameters Symbol Min Max Units MCLK Frequency 1.024 51.2 MHz MCLK Duty Cycle 45 55 % Input Sample Rate Single-Speed Mode Double-Speed Mode Fs Fs 4 50 50 100 kHz kHz LRCK Duty Cycle 40 60 % SCLK Pulse Width Low tsclkl 20 - ns SCLK Pulse Width High tsclkh 20 - ns SCLK Frequency Single-Speed Mode Double-Speed Mode - - 128xFs 64xFs Hz Hz SCLK rising to LRCK edge delay tslrd 20 - ns SCLK rising to LRCK edge setup time tslrs 20 - ns SDIN valid to SCLK rising setup time tsdlrs 20 - ns SCLK rising to SDIN hold time tsdh 20 - ns sclkh t slrs t slrd t sdlrs t sdh t sclkl t SDATA SCLK LRCK Figure 11. Serial Input Timing (External SCLK) |
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