CS4341

12

DS298F5

9. See “Rise Time for Control Port Clock” on page 21 for a recommended circuit to meet rise time

specification.

Parameter

Symbol

Min

Max

Unit

I²C Mode

SCL Clock Frequency

-

100

kHz

RST Rising Edge to Start

500

-

ns

Bus Free Time Between Transmissions

4.7

-

µs

Start Condition Hold Time (prior to first clock pulse)

4.0

-

µs

Clock Low time

4.7

-

µs

Clock High Time

4.0

-

µs

Setup Time for Repeated Start Condition

4.7

-

µs

SDA Hold Time from SCL Falling

(Note 8)

0-

µs

SDA Setup time to SCL Rising

250

-

ns

Rise Time of SCL

(Note 9)

-25

ns

Fall Time of SCL

-25

ns

Rise Time SDA

-1

µs

Fall Time of SDA

-300

ns

Setup Time for Stop Condition

4.7

-

µs

t

buf

t

hdst

t

hdst

t

low

t r

t f

t

hdd

t high

t sud

t sust

t susp

Stop

Start

Start

Stop

Repeated

SDA

SCL

t

irs

RST

Figure 14. Control Port Timing - I²C Mode