ADL5961ACCZ-R2 datasheet(25/34 Pages) AD

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Data Sheet

ADL5961

APPLICATIONS INFORMATION

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Rev. 0 | 25 of 34

INTERFACE DESCRIPTIONS

Power Supply Interfaces

The AVCC, OVCC, and OVDD pins have independent supply

clamps and must be ramped slower than 100 µs to avoid triggering

the clamps. Decoupling of the supply interfaces with 1 nF//4.7 μF

capacitors is recommended to suppress residual high-frequency

ripple. OVDD can be connected to the supply of the SPI controller

to eliminate the need for logic level translators in the SPI bus lines.

Figure 59. Simplified Power Supply Interface Schematics

RFIN and RFOUT Interface

RFIN and RFOUT are both single-ended RF inputs with 50 Ω

characteristic impedance. Because both interfaces are internally

coupled, the input impedance observed at RFIN (or RFOUT) is 50

Ω if, and only if, the other interface, RFOUT (or RFIN), is terminated

with 50 Ω.

Both pins are internally DC-coupled through a 6 Ω series resistance

of the bidirectional bridge. DC blocking capacitors must be used on

these pins to prevent debiasing the input RF mixers. The bridge is

designed to support average signal levels up to 30 dBm in matched

conditions and peak levels up to 35 dBm. Signal voltages on the

interfaces must stay within the −5 V to +10 V range under extreme

mismatched conditions, such as an open circuit that can result in

larger voltage swings than observed with a matched termination.

Figure 60. Simplified RFIN and RFOUT Interfaces

To achieve the best possible bridge directivity, both RFIN and

RFOUT must be connected to carefully matched 50 Ω broadband

transmission lines. A grounded coplanar waveguide (GCPW), as

shown in Figure 61, is a suitable implementation for this purpose.

Use Pin 2 and Pin 4 (AGND) as the RF return path for the RFIN

interface, and use Pin 18 and Pin 20 as the return path for the

RFOUT interface. A ground shield between RFIN and RFOUT

is necessary to minimize interaction outside of the bridge, which

also impacts the measured directivity. The top ground and bottom

ground layers must be connected with as many vias as possible in

the shield between RFIN and RFOUT and around the edge of the

ground return conductors of the GCPW.

Figure 61. Example GCPW Design for Interfacing RFIN and RFOUT

IFFP, IFFM, IFRP, and IFRM Interfaces

The differential IF output amplifiers are capable of driving 100 Ω

differential loads up to 8 V p-p. In the event of an output short circuit

to ground or AVCC, an internal clamp limits the current to less than

roughly 200 mA for each of the single-ended outputs (IFFM, IFFP,

IFRP, and IFRM).

Figure 62. Simplified Schematic of the IF Output Interfaces

VCM Interface

The VCM interface controls the common-mode voltage level at the

IFFx and IFRx output interfaces and simplifies DC-coupled interfac-

ing to a wide variety of ADCs. If provided by the ADC of choice,

VCM can be connected to the common-mode output or reference

output pin to align the common-mode levels and maximize the

available dynamic range.

When the VCM pin is left floating, an internal voltage-divider sets

the common-mode voltage level to OVCC/2. When externally driv-

en, a low-impedance voltage source must be used to set the

voltage on VCM. The tracking range of the VCM voltage to the

common-mode output voltage is linear in the 1 V to 4 V range. For

voltage levels outside this range, the output common-mode level is

clamped to 1 V or 4 V, respectively.

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