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ADL5961ACCZ-R2 数据表(PDF) 7 Page - Analog Devices |
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ADL5961ACCZ-R2 数据表(HTML) 7 Page - Analog Devices |
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7 / 34 page ![]() Data Sheet ADL5961 ABSOLUTE MAXIMUM RATINGS analog.com Rev. 0 | 7 of 34 Table 3. Absolute Maximum Ratings Parameter Rating Supply Voltage (AVCC and OVCC) 5.5 V RFIN, RFOUT Input AC Power Average1 30 dBm Peak1 35 dBm DC Voltage OVDD −0.3 V to +3.8 V SCK, CS, and SDIO −0.3 V to OVDD + 0.3 V IFFP, IFFM, IFRP, IFRM2 −0.3 V to OVCC + 0.3 V Any Other Pin3 −0.3 V to AVCC + 0.3 V DC Current RFIN to or from RFOUT 100 mA Temperature Maximum TJ 150°C TA Operating Range −40°C to +105°C Storage Range −65°C to +150°C 1 Not production tested. Guaranteed by design and correlation to production tested parameters. Peak power duty cycle is 10% maximum. 2 The voltage on these pins must not exceed 5.5 V, OVCC + 0.3 V, or be less than –0.3 V. 3 The voltage on these pins must not exceed 5.5 V, AVCC + 0.3 V, or be less than –0.3 V. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operat- ing conditions for extended periods may affect product reliability. THERMAL RESISTANCE Thermal performance is directly linked to PCB design and operating environment. Careful attention to PCB thermal design is required. Table 4. Thermal Resistance Package Type1 θJA2 θJB3 θJCT4 θJCB5 ΨJT6 ΨJB7 Unit CC-26-2 39.32 13.10 30.09 7.63 1.30 12.95 °C/W 1 Test Condition 1: thermal impedance simulated values are based upon use of 2S2P JEDEC PCB. See the Ordering Guide. 2 θJA is the junction to ambient (or die to ambient) thermal resistance measured in a one cubic foot sealed enclosure. 3 θJB is the junction-to-board thermal resistance. 4 θJCT is the junction-to-case top (or die to package) thermal resistance. 5 θJCB is the junction-to-case bottom thermal resistance. 6 ѰJT refers to the junction to top thermal characterization number. 7 ѰJB refers to the junction to board thermal characterization number. ELECTROSTATIC DISCHARGE (ESD) RATING The following ESD information is provided for handling of ESD-sen- sitive devices in an ESD-protected area only. Human body model (HBM) per ANSI/ESDA/JEDEC JS-001. Field induced charged-device model (FICDM) per ANSI/ESDA/JE- DEC JS-002. ESD Ratings for ADL5961 Table 5. ADL5961, 26-Lead LGA ESD Model Withstand Threshold (V) Class HBM 2000 2 FICDM 500 1B ESD CAUTION ESD (electrostatic discharge) sensitive device. Charged devi- ces and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. |
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