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ADL5961ACCZ-R2 数据表(PDF) 20 Page - Analog Devices |
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ADL5961ACCZ-R2 数据表(HTML) 20 Page - Analog Devices |
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20 / 34 page ![]() Data Sheet ADL5961 THEORY OF OPERATION analog.com Rev. 0 | 20 of 34 MULTIPORT VNA The ADL5961 can also be used to create VNAs consisting of multiple ports, as shown in Figure 54. Each port connects to one ADL5961, and RF switches route the RF signal to one ADL5961 at a time. For optimum phase (and magnitude) accuracy, ensure that the connections from the RF source to all ports are equal in length. Furthermore, always terminate the RFIN ports of the ADL5961 devices with 50 Ω, that is, when the RF source is connected but also when the RF source is not connected to the port. To achieve this, use an SPxT nonreflective switch with the RF source connected to the pole. For VNAs with many ports, a cascade of nonreflective (terminated) RF switches can be used at the expense of larger insertion loss and potentially increased frequency tilt. Note that the connections to the RF source as drawn in Figure 54 are simplified and do not by any means follow the recommendations for an optimal layout of the system. Phase synchronization between the ADL5961 devices is achieved through the LO and offset frequency signals. For optimal accuracy, match the propagation delays from the LO source to each of the ADL5961 devices. Residual delay differences can be addressed through calibration procedures for the VNA system. Routing of the signal lines to the offset interface is less critical because these lines operate at much lower frequencies. The SYNC interface is used to force the LO and offset dividers in all ADL5961 devices to the same known initial state, such that no phase ambiguities exist between the devices. A single pulse applied to this input after power-on is sufficient to synchronize all devices. Perform this synchronization before an LO signal is applied. In this case, the timing of the SYNC pulse is not critical. For optimal accuracy, simultaneous sampling of all ADL5961 IF channels is recommended. For high port counts, a multichannel simultaneous sampling ADC can significantly reduce the solution footprint. Some of these multichannel devices include built-in digital downconversion (DDC) and decimation filters, which reduce the amount of processing required in a digital signal processor (DSP). The performance of the system can further be enhanced by insert- ing a programmable RF filter in the RF path to filter any harmonic content of the RF source and a programmable attenuator to com- pensate for the tilt vs. frequency introduced by any filters, switches, and transmission lines. Figure 54. Multiport VNA-Based on the ADL5961 (IFR Is IF Reverse, and IFF Is IF Forward) |
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