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ADP1829ACPZ-R7 数据表(PDF) 17 Page - Analog Devices |
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ADP1829ACPZ-R7 数据表(HTML) 17 Page - Analog Devices |
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17 / 32 page ![]() ADP1829 Rev. 0 | Page 17 of 32 In the case of output capacitors where the impedance of the ESR and ESL are small at the switching frequency, for instance, where the output capacitor is a bank of parallel MLCC capacitors, the capacitive impedance dominates and the ripple equation reduces to SW OUT L OUT f C I V 8 Δ ≈ Δ (7) Make sure that the ripple current rating of the output capacitors is greater than the maximum inductor ripple current. During a load step transient on the output, the output capacitor supplies the load until the control loop has a chance to ramp the inductor current. This initial output voltage deviation due to a change in load is dependent on the output capacitor characteristics. Again, usually the capacitor ESR dominates this response, and the ΔVOUT in Equation 6 can be used with the load step current value for ΔIL. SELECTING THE MOSFETS The choice of MOSFET directly affects the dc-to-dc converter performance. The MOSFET must have low on resistance (RDSON) to reduce I2R losses and low gate-charge to reduce switching losses. In addition, the MOSFET must have low thermal resistance to ensure that the power dissipated in the MOSFET does not result in overheating. The power switch, or high-side MOSFET, carries the load current during the PWM on-time, carries the transition loss of the switching behavior, and requires gate charge drive to switch. Typically, the smaller the MOSFET RDSON, the higher the gate charge and vice versa. Therefore, it is important to choose a high-side MOSFET that balances those two losses. The conduction loss of the high-side MOSFET is determined by the equation IN OUT DSON 2 L C V V R I P ≈ (8) where: PC is the conduction power loss. RDSON is the MOSFET on resistance. The gate charge losses are dissipated by the ADP1829 regulator and gate drivers and affect the efficiency of the system. The gate charge loss is approximated by the equation SW G IN G f Q V P ≈ (9) where: PG is the gate charge power. QG is the MOSFET total gate charge. fSW is the converter switching frequency. Making the conduction losses balance the gate charge losses usually yields the most efficient choice. Furthermore, the high-side MOSFET transition loss is approximated by the equation ( ) 2 SW F R L IN T f t t I V P + ≈ (10) where tR and tF are the rise and fall times of the selected MOSFET as stated in the MOSFET data sheet. The total power dissipation of the high-side MOSFET is the sum of the previous losses. T G C D P P P P + + = (11) where PD is the total high-side MOSFET power loss. This dissipation heats the high-side MOSFET. The conduction losses may need an adjustment to account for the MOSFET RDSON variation with temperature. Note that MOSFET RDSON increases with increasing temperature. The MOSFET data sheet should list the thermal resistance of the package, θJA, along with a normalized curve of the temperature coefficient of the RDSON. For the power dissipation estimated in Equation 11, calculate the MOSFET junction temperature rise over the ambient temperature of interest. D JA A J P θ T T + = (12) Then calculate the new RDSON from the temperature coefficient curve and the RDSON specification at 25°C. A typical value of the temperature coefficient (TC) of the RDSON is 0.004/°C, so an alternate method to calculate the MOSFET RDSON at a second temperature, TJ, is )] C 25 ( 1 [ C 25 @ @ ° − + ° = J DSON J DSON T TC R T R (13) Then the conduction losses can be recalculated and the procedure iterated once or twice until the junction temperature calculations are relatively consistent. The synchronous rectifier, or low-side MOSFET, carries the inductor current when the high-side MOSFET is off. For high input voltage and low output voltage, the low-side MOSFET carries the current most of the time, and therefore, to achieve high efficiency, it is critical to optimize the low-side MOSFET for small on resistance. In cases where the power loss exceeds the MOSFET rating, or lower resistance is required than is available in a single MOSFET, connect multiple low-side MOSFETs in parallel. The equation for low-side MOSFET power loss is ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − ≈ IN OUT DSON 2 L LS V V 1 R I P (14) where: PLS is the low-side MOSFET on resistance. RDSON is the parallel combination of the resistances of the low- side MOSFETs. Check the gate charge losses of the synchronous rectifier(s) using the PG equation (Equation 9) to be sure they are reasonable. |
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