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ADP1829ACPZ-R7 数据表(PDF) 22 Page - Analog Devices |
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ADP1829ACPZ-R7 数据表(HTML) 22 Page - Analog Devices |
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22 / 32 page ![]() ADP1829 Rev. 0 | Page 22 of 32 Because of the finite output current drive of the error amplifier, CI needs to be less than 10 nF. If it is larger than 10 nF, choose a larger RTOP and recalculate RZ and CI until CI is less than 10 nF. Because CHF << CI, combining Equation 29 and Equation 39 yields Z SW HF R f C π 1 = (44) Next, calculate the feedforward capacitor, CFF.. Assume RFF << RTOP, then Equation 28 is simplified to TOP FF Z2 R C f π 2 1 = (45) Solving CFF in Equation 45 yields Z2 TOP FF f R C π 2 1 = (46) where fZ2 is obtained from Equation 40 or Equation 41. The feedforward resistor, RFF, can be calculated by combining Equation 30 and Equation 39 SW FF FF f C R π 1 = (47) Check that the calculated component values are reasonable. For instance, capacitors smaller than about 10 pF should be avoided. In addition, the ADP1829 error amplifier has finite output current drive, so RZ values less than 3 kΩ and CI values greater than 10 nF should be avoided. If necessary, recalculate the compensation network with a different starting value of RTOP. If RZ is too small and CI is too big, start with a larger value of RTOP. This compensation technique should yield a good working solution. In general, aluminum electrolytic capacitors have high ESR, and a Type II compensation is adequate. However, if several aluminum electrolytic capacitors are connected in parallel, producing a low effective ESR, then Type III compensation is needed. In addition, ceramic capacitors have very low ESR, in the order of a few milliohms. Type III compensation is needed for ceramic output capacitors. Type III compensation offers better performance than Type II in terms of more low frequency gain and more phase margin and less high frequency gain at the cross-over frequency. For a more exact method or to optimize for other system characteristics, a number of references and tools are available from your Analog Devices, Inc. applications support team. SOFT START The ADP1829 uses an adjustable soft start to limit the output voltage ramp-up period, thus limiting the input inrush current. The soft start is set by selecting the capacitor, CSS, from SS1 and SS2 to GND. The ADP1829 charges CSS to 0.8 V through an internal 90 kΩ resistor. The voltage on the soft start capacitor while it is charging is ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − = SS RC t CSS e V 1 V 8 . 0 (48) The soft start period ends when the voltage on the soft start pin reaches 0.6 V. Substituting 0.6 V for VSS and solving for the number of RC time constants, () ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − = SS SS C t e kΩ 90 1 V 8 . 0 V 6 . 0 (49) SS SS RC t 386 . 1 = (50) Because R = 90 kΩ, sec μF/ 8 × = SS SS t C (51) where tSS is the desired soft start time in seconds. VOLTAGE TRACKING The ADP1829 includes a tracking feature that prevents an output voltage from exceeding a master voltage. This is especially important when the ADP1829 is powering separate power supply voltages on a single integrated circuit, such as the core and I/O voltages of a DSP or microcontroller. In these cases, improper sequencing can cause damage to the load. The ADP1829 tracking input is an additional positive input to the error amplifier. The feedback voltage is regulated to the lower of the 0.6 V reference or the voltage at TRK, so a lower voltage on TRK limits the output voltage. This feature allows implementation of two different types of tracking: coincident tracking, where the output voltage is the same as the master voltage until the master voltage reaches regulation, or ratiometric tracking, where the output voltage is limited to a fraction of the master voltage. In all tracking configurations, the master voltage should be higher than the slave voltage. Note that the soft start time setting of the master voltage should be longer than the soft start of the slave voltage. This forces the rise time of the master voltage to be imposed on the slave voltage. If the soft start setting of the slave voltage is longer, the slave comes up more slowly and the tracking relationship is not seen at the output. The slave channel should still have a soft start capacitor to give a small but reasonable soft start time to protect in case of restart after a current-limit event. COMP FB TRK SS MASTER VOLTAGE RTRKT RTRKB 0.6V DETAIL VIEW OF ADP1829 ERROR AMPLIFIER VOUT RTOP RBOT Figure 30. Voltage Tracking |
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