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SC1486AEVB 数据表(PDF) 14 Page - Semtech Corporation

部件名 SC1486AEVB
功能描述  Complete DDR1/2/3 Power Supply Controller
PDF  30 Pages
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制造商  SEMTECH [Semtech Corporation]
网页  http://www.semtech.com
标志 SEMTECH - Semtech Corporation

SC1486AEVB 数据表(HTML) 14 Page - Semtech Corporation

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 2006 Semtech Corp.
www.semtech.com
SC1486A
POWER MANAGEMENT
Application Information (Cont.)
Design Procedure (Cont.)
For our DDR2 VDDQ example:
I
RIPPLE_VIN(MIN) = 2.07AP-P and IRIPPLE_VIN(MAX) = 2.73AP-P
From this we can calculate the minimum inductor
current rating for normal operation:
)
MIN
(
)
MAX
(
VIN
_
RIPPLE
)
MAX
(
OUT
)
MIN
(
INDUCTOR
A
2
I
I
I
+
=
For our DDR2 VDDQ example:
I
INDUCTOR(MIN) = 11.4A(MIN)
Next we will calculate the maximum output capacitor
equivalent series resistance (ESR). This is determined by
calculating the remaining static and transient tolerance
allowances. Then the maximum ESR is the smaller of the
calculated static ESR (R
ESR_ST(MAX)) and transient ESR
(R
ESR_TR(MAX)):
()
Ohms
I
2
ERR
ERR
R
)
MAX
(
VIN
_
RIPPLE
DC
ST
)
MAX
(
ST
_
ESR
•
−
=
Where ERR
ST is the static output tolerance and ERRDC is
the DC error. The DC error will be 1% plus the tolerance
of the feedback resistors, thus 2% total for 1% feed-
back resistors.
For our DDR2 VDDQ example:
ERR
ST = 100mV and ERRDC = 36mV, therefore
R
ESR_ST(MAX) = 47mΩ
()
Ohms
2
I
I
ERR
ERR
R
)
MAX
(
VIN
_
RIPPLE
OUT
DC
TR
)
MAX
(
TR
_
ESR


+
−
=
Where ERR
TR is the transient output tolerance. Note that
this calculation assumes that the worst case load tran-
sient is full load. For half of full load, divide the I
OUT term
by 2.
For our DDR2 VDDQ example:
ERR
TR = 144mV and ERRDC = 36mV, therefore
R
ESR_TR(MAX) = 9.5mΩ for a full 10A load transient
We will select a value of 12.5m
Ω maximum for our
design, which would be achieved by using two 25m
Ω
output capacitors in parallel.
Note that for constant-on converters there is a minimum
ESR requirement for stability which can be calculated as
follows:
SW
OUT
)
MIN
(
ESR
f
C
2
3
R
•
•
π
•
=
This criteria should be checked once the output
capacitance has been determined.
Now that we know the output ESR we can calculate the
output ripple voltage:
P
P
)
MAX
(
VIN
_
RIPPLE
ESR
)
MAX
(
VIN
_
RIPPLE
V
I
R
V
−
•
=
and
P
P
)
MIN
(
VIN
_
RIPPLE
ESR
)
MIN
(
VIN
_
RIPPLE
V
I
R
V
−
•
=
For our DDR2 VDDQ example:
V
RIPPLE_VIN(MAX) = 34mVP-P and VRIPPLE_VIN(MIN) = 26mVP-P
Note that in order for the device to regulate in a
controlled manner, the ripple content at the feedback
pin, V
FB, should be approximately 15mVP-P at minimum
V
IN, and wo rst case no smaller than 10mVP-P. If
V
RIPPLE_VIN(MIN) is less than 15mVP-P the above component
values should be revisited in order to improve this. Quite
often a small capacitor, C
TOP, is required in parallel with
the top feedback resistor, R
TOP, in order to ensure that
V
FB is large enough. CTOP should not be greater than
100pF. The value of C
TOP can be calculated as follows,
where R
BOT is the bottom feedback resistor. Firstly
calculating the value of Z
TOP required:
()Ohms
015
.
0
V
015
.
0
R
Z
)
MIN
(
VIN
_
RIPPLE
BOT
TOP
−
•
=
Secondly calculating the value of C
TOP required to achieve
this:



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