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SC1486AEVB 数据表(PDF) 16 Page - Semtech Corporation |
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SC1486AEVB 数据表(HTML) 16 Page - Semtech Corporation |
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16 / 30 page ![]() 16 2006 Semtech Corp. www.semtech.com SC1486A POWER MANAGEMENT Application Information (Cont.) Design Procedure (Cont.) () Ohms 10 10 4 . 1 R 2 . 1 I R 6 ) ON ( DS VALLEY ILIM − • • • • = For our DDR2 VDDQ example: I VALLEY = 8.97A and RILIM = 13.6kΩ We select the next lowest 1% resistor value: 13.3k Ω Thermal Considerations The junction temperature of the device may be calculated as follows: C P T T JA D A J ° θ • + = Where: T A = ambient temperature (°C) P D = power dissipation in (W) θ JA = thermal impedance junction to ambient from absolute maximum ratings (°C/W) The power dissipation may be calculated as follows: () W f Q V I VCCA 2 P g g VCCA D • • + • • = Where: VCCA = chip supply voltage (V) I VCCA = operating current (A) V g = gate drive voltage, typically 5V (V) Q g = FET gate charge, from the FET datasheet (C) f = switching frequency (kHz) Inserting the following values as an example: T A = 85°C θ JA = 37°C/W VCCA = 5V I VCCA = 1100µA (data sheet maximum) V g = 5V Q g = 60nC f = 300kHz (enter the higher of the two set frequencies here) gives us: () C 98 70 10 300 10 60 5 10 1100 5 2 85 T 3 9 6 J ° = • • • • • + • • • + = − − As can be seen, the heating effects due to internal power dissipation are minor, thus requiring no special consider- ation thermally during layout. |
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