RT8800AGQV datasheet(12/21 Pages) RICHTEK

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RT8800A

DS8800A-04 August 2007

www.richtek.com

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Figure 5. Test Circuit of GM.

Phase Current Balance

The sampled and held phase current IX are injected to the

corresponding saw tooth waveforms of PWM comparators.

If phase current IX is larger than other phase currents, its

saw tooth waveform will be lift higher than the others. The

RT8800A reduces the duty cycle of corresponding phase

to decrease the phase current accordingly, vice versa.

Over Current Protection

RT8800A uses an external resistor RIMAX connected to

IMAX pin to generate a reference current IIMAX for over

current protection:

IMAX

where VIMAX is 0.8V typical. OCP comparator compares

each sensed phase current IX with this reference current

as shown in Figure 6. Equivalently, the maximum phase

current is calculated as :

COMM

IMAX

LX(MAX)

Figure 6. Over Current Comparator.

1/3 IX

1/2 IIMAX

OCP Comparator

The RT8800A uses hiccup mode to eliminate nuisance

detection of OCP or reduce output current when output is

shorted to ground as shown in Figure 7 and 8. The

RT8800A shuts down and latches off after 3 time OCP

hiccups. It can only restart by resetting one of VDD or

DVD pin.

Figure 7. The Over Current Protection in the interval

Figure 8. Over Current Protection at steady state

(5V/Div)

Over Current Protection

Time (25ms/Div)

PWM

(5V/Div)

Voltage Reference for Converter Output & Load

Droop

The output voltage is sensed at FB pin. The RT8800A

receives an external reference voltage at PI pin as the

non-inverting of the error amplifier and precisely regulates

the FB voltage to this reference voltage. The RT8800A

can provide Intel® VRD10.x or AMD® K8 compliant output

voltage when companioned with DAC generator

RT9401A/B as shown in Figure 9. The RT9401A/B receives

VID[0:4] and produces DAC_OUT that complies with

VRD10.x or K8 VID table. The DAC_OUT is fed to PI pin

through a resistor RADJ as the reference voltage of the

error amplifiers. The VID125 provides a 12.5mV offset for

full compliance of VRD10.x table.

Over Current Protection

Time (25ms/Div)

PWM

VSS

(5V/Div)

MUX

S/H

SUM/N

ISP1

ISP2

ISP3

ICOMMON

RT9401

RADJ

+ VADJ -

IADJ

VCORE

DAC_OUT

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