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KSZ9567R 数据表(PDF) 218 Page - Microchip Technology |
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KSZ9567R 数据表(HTML) 218 Page - Microchip Technology |
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218 / 233 page ![]() KSZ9567R DS00002329E-page 218 2022 Microchip Technology Inc. and its subsidiaries 7.0 DESIGN GUIDELINES This section provides general design guidelines for the following: • Reset Circuit Guidelines • Magnetics Connection and Selection Guidelines 7.1 Reset Circuit Guidelines Figure 7-1 illustrates the recommended reset circuit for powering up the KSZ9567R if reset is triggered by the power supply. Figure 7-2 illustrates a reset circuit recommended for applications where reset is driven by another device, such as a CPU. At power-on reset, R, C and D1 provide the necessary ramp rise time to reset the KSZ9567R. The RST_OUT_N from the CPU provides a warm reset after power-up. FIGURE 7-1: SIMPLE RESET CIRCUIT FIGURE 7-2: RESET CIRCUIT FOR CPU RESET INTERFACE Ethernet Switch VDDIO D1 D1: 1N4148 R 10K C 10uF RESET_N Ethernet Switch CPU/FPGA VDDIO C 10uF R 10K RST_OUT_N D1 D2 D1, D2: 1N4148 RESET_N |
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