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KSZ9567R 数据表(PDF) 114 Page - Microchip Technology |
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KSZ9567R 数据表(HTML) 114 Page - Microchip Technology |
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114 / 233 page  KSZ9567R DS00002329E-page 114 2022 Microchip Technology Inc. and its subsidiaries 5.1.6.2 Global PTP RTC Clock Phase Register 5.1.6.3 Global PTP RTC Clock Nanosecond High Word Register 5.1.6.4 Global PTP RTC Clock Nanosecond Low Word Register 5.1.6.5 Global PTP RTC Clock Second High Word Register Address: 0x0502 - 0x0503 Size: 16 bits Bits Description Type Default 15:3 RESERVED RO 0x0000 2:0 PTP Real Time Clock 8ns Phase This register indicates one of the 8n sub-cycle phases of the 40ns period PTP real time clock. 000 = 0ns (real time clock at the first 8ns phase in the 40ns period) 001 = 8ns (real time clock at the second 8ns phase in the 40ns period) 010 = 16ns (real time clock at the third 8ns phase in the 40ns period) 011 = 24ns (real time clock at the fourth 8ns phase in the 40ns period) 100 = 32ns (real time clock at the fifth 8ns phase in the 40ns period) 101 - 111 = not valid R/W 000b Address: 0x0504 - 0x0505 Size: 16 bits Bits Description Type Default 15:0 PTP Real Time Clock Nanosecond [31:16] This is the high word of the nanosecond value of the PTP real time clock. R/W 0x0000 Address: 0x0506 - 0x0507 Size: 16 bits Bits Description Type Default 15:0 PTP Real Time Clock Nanosecond [15:0] This is the low word of the nanosecond value of the PTP real time clock. R/W 0x0000 Address: 0x0508 - 0x0509 Size: 16 bits Bits Description Type Default 15:0 PTP Real Time Clock Second [31:16] This is the high word of the second value of the PTP real time clock. R/W 0x0000 |
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