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KSZ9567R 数据表(PDF) 173 Page - Microchip Technology |
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KSZ9567R 数据表(HTML) 173 Page - Microchip Technology |
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173 / 233 page ![]() 2022 Microchip Technology Inc. and its subsidiaries DS00002329E-page 173 KSZ9567R 5.2.7.6 Port Priority to Queue Mapping Register 5.2.7.7 Port Police Control Register 1:0 Queue Pointer Used to point to the indirect mapping locations for the 4 queues R/W 00b Address: 0xN808 - 0xN80B Port N: 1-7 Size: 32 bits Bits Description Type Default 31:28 Regenerated priority (queue) value for priority 7. The 2 most significant bits are reserved. R/W xx11b 27:24 Regenerated priority (queue) value for priority 6. The 2 most significant bits are reserved. R/W xx11b 23:20 Regenerated priority (queue) value for priority 5. The 2 most significant bits are reserved. R/W xx10b 19:16 Regenerated priority (queue) value for priority 4. The 2 most significant bits are reserved. R/W xx10b 15:12 Regenerated priority (queue) value for priority 3. The 2 most significant bits are reserved. R/W xx01b 11:8 Regenerated priority (queue) value for priority 2. The 2 most significant bits are reserved. R/W xx01b 7:4 Regenerated priority (queue) value for priority 1. The 2 most significant bits are reserved. R/W xx00b 3:0 Regenerated priority (queue) value for priority 0. The 2 most significant bits are reserved. R/W xx00b Address: 0xN80C - 0xN80F Port N: 1-7 Size: 8 bits Bits Description Type Default 31:12 RESERVED RO 0x00000 11 Dropped Color 1 = Color packet PMON holds dropped packets of that color 0 = Color packet PMON holds all packets of that color R/W 0b 10 Drop All 1 = All packets are dropped while max threshold is exceeded in PM WRED 0 = Drop packet based on WRED_PM_PROB_MULTIPLIER R/W 0b Bits Description Type Default |
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