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KSZ9567R 数据表(PDF) 209 Page - Microchip Technology |
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KSZ9567R 数据表(HTML) 209 Page - Microchip Technology |
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209 / 233 page ![]() 2022 Microchip Technology Inc. and its subsidiaries DS00002329E-page 209 KSZ9567R 6.4.2.4 MII Transmit Timing in PHY Mode FIGURE 6-5: MII TRANSMIT TIMING IN PHY MODE TABLE 6-6: MII TRANSMIT TIMING IN PHY MODE VALUES Symbol Description Min Typ Max Units tP (100BASE-TX / 10BASE-Te) TX_CLK period 40/400 ns tWL (100BASE-TX / 10BASE-Te) TX_CLK pulse width low 20/200 ns tWH (100BASE-TX / 10BASE-Te) TX_CLK pulse width high 20/200 ns tSU1 TXD_[3:0] setup time to rising edge of TX_CLK 10 ns tSU2 TX_EN, TX_ER setup time to rising edge of TX_CLK 10 ns tHD1 TXD_[3:0] hold time from rising edge of TX_CLK 0ns tHD2 TX_EN, TX_ER hold time from rising edge of TX_CLK 0ns |
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