KSZ9567R datasheet(143/233 Pages) MICROCHIP

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DS00002329E-page 143

KSZ9567R

5.2.2.5

PHY Auto-Negotiation Advertisement Register

PHY register 0x04.

Note 5-5

The default value of this field is determined by the LED1_1 configuration strap value. Refer to Section

3.2.1, "Configuration Straps," on page 16 for additional information.

Address:

0xN108 - 0xN109

Port N: 1-5

Size:

16 bits

Bits

Description

Type

Default

1 = Next page capable

0 = No next page capability

R/W

RESERVED

Remote Fault

1 = Remote fault capable

0 = No remote fault capability

R/W

RESERVED

11:10

Pause (Flow Control) Capability

11 = Both Symmetric PAUSE and Asymmetric PAUSE toward local device

10 = Asymmetric PAUSE toward link partner

01 = Symmetric PAUSE

00 = No PAUSE

R/W

Note 5-5

100BASE-T4

1 = 100BASE-T4 capable

0 = No 100BASE-T4 capability

100BASE-TX Full Duplex

1 = 100BASE-TX full duplex capable

0 = No 100BASE-TX full duplex capability

R/W

100BASE-TX Half Duplex

1 = 100BASE-TX half duplex capable

0 = No 100BASE-TX half duplex capability

R/W

10BASE-T Full Duplex

1 = 10BASE-T full duplex capable

0 = No 10BASE-T full duplex capability

R/W

10BASE-T Half Duplex

1 = 10BASE-T half duplex capable

0 = No 10BASE-T half duplex capability

R/W

4:0

Selector Field

00001 = IEEE 802.3

R/W

0x01

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