ST10F272M datasheet(139/175 Pages) STMICROELECTRONICS

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ST10F272M

Electrical characteristics

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The considerations above lead to impose new constraints to the external circuit, to reduce

the accuracy error due to the voltage drop on CS; from the two charge balance equations

above, it is simple to derive the following relation between the ideal and real sampled

voltage on CS:

From this formula, in the worst case (when VA is maximum, that is for instance 5V),

assuming to accept a maximum error of half a count (~2.44mV), a constraint is immediately

evident on CF value:

In the next section an example of how to design the external network is provided, assuming

some reasonable values for the internal parameters and making a hypothesis on the

characteristics of the analog signal to be sampled.

Example of external network sizing

The following hypotheses are formulated in order to proceed in designing the external

network on A/D Converter input pins:

●

Analog Signal Source Bandwidth (f0): 10 kHz

●

conversion Rate (fC): 25 kHz

●

Sampling Time (TS): 1µs

●

Pin Input Capacitance (CP1): 5pF

●

Pin Input Routing Capacitance (CP2): 1pF

●

Sampling Capacitance (CS): 4pF

●

Maximum Input Current Injection (IINJ): 3mA

●

Maximum Analog Source Voltage (VAM): 12V

●

Analog Source Impedance (RS): 100Ω

●

Channel Switch Resistance (RSW): 500Ω

●

Sampling Switch Resistance (RAD): 200Ω

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2048 C

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