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L6740L 数据表(PDF) 12 Page - STMicroelectronics |
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L6740L 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 44 page ![]() Pins description and connection diagrams L6740L 12/44 2.2 Thermal data Table 3. Thermal data 42 NB_ENDRV External driver enable. Open Drain output used to control NB Section external driver status: pulled-low to manage HiZ conditions or pulled-high to enable the driver. Pull up to 3.3V (typ) or lower. When in PVI Mode, NB Section is always kept in HiZ. 43 ENDRV External Driver enable. Open Drain output used to control CORE Section external driver status: pulled-low to manage HiZ conditions or pulled-high to enable the driver. Pull up to 3.3V (typ) or lower. 44 NB_PWM PWM output. Connect to external driver PWM input. The device is able to manage HiZ status by setting the pin floating. When in PVI Mode, NB Section is kept in HiZ. See Section 5.4.4 for details about HiZ management. 45 to 48 PWM1 to PWM4 PWM outputs. Connect to external drivers PWM inputs. The device is able to manage HiZ status by setting the pins floating. By shorting to SGND PWM4 or PWM3 and PWM4, it is possible to pro- gram the CORE section to work at 3 or 2 phase respectively. See Section 5.4.4 for details about HiZ management. Thermal pad Thermal pad connects the Silicon substrate and makes good thermal contact with the PCB. Connect to the PGND plane. Table 2. Pin description (continued) Pin# Name Function Symbol Parameter Value Unit RthJA Thermal resistance junction to ambient (Device soldered on 2s2p PC Board) 40 °C/W RthJC Thermal resistance junction to case 1 °C/W TMAX Maximum junction temperature 150 °C TSTG Storage temperature range -40 to 150 °C TJ Junction temperature range 0 to 125 °C |
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