L6740L datasheet(28/44 Pages) STMICROELECTRONICS

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Output voltage positioning

L6740L

28/44

Caution:

Offset implementation is optional, in case it is not desired, simply short the pin to SGND.

Note:

In the above formulas, RFB_NB has to be considered being the total resistance connected

between NB_FB pin and the regulated voltage.

6.8

NB section - Maximum Duty-Cycle limitation

To provide proper time for current-reading across the Low-Side MOSFET, the device imple-

ments a duty-cycle limitation for the NB Section. This limitation is not fixed but it is linearly

variable with the current delivered to the load as follow:

Duty Cycle limitation is variable with the delivered current to provide fast load transient

response at light load as well as assuring robust over-current protection.

6.9

On-The-Fly VID transitions

L6740L manages On-The-Fly VID Transitions that allow the Output Voltage of both sections

to modify during normal device operation for CPU power management purposes. OV, UV

and PWRGOOD signals are masked during every OTF-VID Transition and they are re-acti-

vated with a 16 clock cycle delay to prevent from false triggering.

When changing dynamically the regulated voltage (OTF-VID), the system needs to charge

or discharge the output capacitor accordingly. This means that an extra-current IOTF-VID

needs to be delivered (especially when increasing the output regulated voltage) and it must

be considered when setting the over current threshold of both the sections. This current

results:

where dVOUT / dTVID depends on the operative mode (3mV/µsec. in SVI or externally driven

in PVI).

Overcoming the OC threshold during the dynamic VID causes the device latch and disable.

Dynamic VID transition is managed in different ways according to the device operative

mode:

●

PVI mode.

L6740L checks for VID code modifications (See Figure 11) on the rising-edge of an

internal additional OTFVID-clock and waits for a confirmation on the following falling

edge. Once the new code is stable, on the next rising edge, the reference starts

stepping up or down in LSB increments every two OTFVID-clock cycle until the new

VID code is reached. During the transition, VID code changes are ignored; the device

OS_NB

1.240V

OS_NB

-------------------- R

FB_NB

⋅

ON_NB(max)

0.80 T

NB_ISEN

µA

⋅

0.40 T

NB_ISEN

µA

⋅

⎩

⎨

⎧

OTF-VID

OUT

VID

------------------

⋅

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