L6740L datasheet(27/44 Pages) STMICROELECTRONICS

27 / 44 page

L6740L

Output voltage positioning

27/44

6.6

NB section - Load-line and load-indicator (Optional)

This method introduces a dependence of the output voltage on the load current recovering

part of the drop due to the output capacitor ESR in the load transient. Introducing a depen-

dence of the output voltage on the load current, a static error, proportional to the output cur-

rent, causes the output voltage to vary according to the sensed current.

Figure 10 shows the Current Sense Circuit used to implement the Load-Line. The current

flowing across the Low-Side MOSFET is read through RISEN. RISEN programs a transcon-

ductance gain and generates a current IISEN proportional to the current delivered by the NB

Section that is then sourced by the NB_FB pin (IDROOP_NB). RFB_NB gives the final gain to

program the desired load-line slope (Figure 9).

The output characteristic vs. load current is then given by (Offset disabled):

Where RLL_NB is the resulting Load-Line resistance implemented by the NB Section.

The whole power supply can be then represented by a “real” voltage generator with an

equivalent output resistance RLL_NB and a voltage value of VID.

RFB_NB resistor can be then designed according to the RLL_NB specifications as follow:

Caution:

Load-Line (DROOP) implementation is optional, in case it is not desired, the resulting cur-

rent information may be employed for other purposes, such as Load Indicator (LI). In this

case, simply connect a resistor RLI_NB to SGND: the resulting voltage drop across RLI_NB

will be proportional to the delivered current according to the following relationship:

Note:

Split between RFB_COMP_NB and RFB_DROOP_NB (Figure 9) is useful in custom designs

where the Droop effect is minimum (i.e. <50mV over 100A) to simplify the compensation

network design.

6.7

NB section - Offset (Optional)

The NB_OS pin allows programming a positive offset (VOS_NB) for the NB Section output

voltage by connecting a resistor ROS_NB to SGND. The pin is internally fixed at 1.240V so a

current is programmed by connecting the resistor ROS_NB between the pin and SGND: this

current is mirrored and then properly sunk from the NB_FB pin as shown in Figure 9. Output

voltage is then programmed as follow:

Offset resistor can be designed by considering the following relationship (RFB_NB may be

fixed by the Droop effect):

OUT_NB

VID

FB_NB

DROOP_NB

⋅

–

VID

FB_NB

dsON

ISEN

----------------- I

OUT

⋅⋅

–

VID

LL_NB

OUT_NB

⋅

–

FB_NB

LL_NB

ISEN

dsON

-----------------

⋅

NB_DROOP

LI_NB

dsON

ISEN

----------------- I

OUT_NB

⋅⋅

VID

FB_NB

DROOP_NB IOS_NB

–

()

⋅

–

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