WM8994ECSSLASHR datasheet(189/363 Pages) CIRRUS

189 / 363 page

WM8994

Rev 4.6

189

The GPIO11 pin also supports the BCLK3 function. When configured as BCLK3, this pin outputs the

BCLK signal from AIF1 or AIF2. The applicable AIF source is determined automatically as defined in

Table 102. Note that the BCLK3 signal is also controlled by the logic illustrated in Figure 62 (AIF1) or

Figure 65 (AIF2), depending on the selected AIF source.

CONDITION

DESCRIPTION

AIF1_DACDAT_SRC = 1

(DACDAT3 selected as AIF1 data input)

AIF1 selected as BCLK3 / LRCLK3 source

AIF3_ADCDAT_SRC[1:0] = 00

(AIF1 data output selected on ADCDAT3)

AIF1 selected as BCLK3 / LRCLK3 source

All other conditions

AIF2 selected as BCLK3 / LRCLK3 source

Table 102 BCLK3 / LRCLK3 Configuration

AIF3 interface can be tri-stated by setting the AIF3_TRI register. When this bit is set, then all of the

AIF3 outputs are un-driven (high-impedance). The AIF3_TRIS register only affects those pins which

are configured for AIF3 functions; it does not affect pins which are configured for other functions.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R6 (0006h)

Power

Management

(6)

AIF3_TRI

AIF3 Audio Interface tri-state

0 = AIF3 pins operate normally

1 = Tri-state all AIF3 interface pins

Note that pins not configured as AIF3

functions are not affected by this register.

4:3

AIF3_ADCD

AT_SRC

[1:0]

GPIO9/ADCDAT3 Source select

00 = AIF1 ADCDAT1

01 = AIF2 ADCDAT2

10 = GPIO5/DACDAT2

11 = Reserved

Note that GPIO9 must be configured as

ADCDAT3. For selection 10, the GPIO5 pin

must also be configured as DACDAT2.

AIF2_ADCD

AT_SRC

GPIO7/ADCDAT2 Source select

0 = AIF2 ADCDAT2

1 = GPIO8/DACDAT3

Note that GPIO7 must be configured as

ADCDAT2. For selection 1, the GPIO8 pin

must also be configured as DACDAT3.

AIF2_DACD

AT_SRC

AIF2 DACDAT Source select

0 = GPIO5/DACDAT2

1 = GPIO8/DACDAT3

Note that the selected source must be

configured as DACDAT2 or DACDAT3.

AIF1_DACD

AT_SRC

AIF1 DACDAT Source select

0 = DACDAT1

1 = GPIO8/DACDAT3

Note that, for selection 1, the GPIO8 pin must

be configured as DACDAT3.

Table 103 Audio Interface AIF3 Configuration

WM8994ECS/R 数据表(PDF) 189 Page - Cirrus Logic

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WM8994ECS/R 数据表(PDF) 189 Page - Cirrus Logic

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