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WM8994ECS/R 数据表(PDF) 248 Page - Cirrus Logic |
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WM8994ECS/R 数据表(HTML) 248 Page - Cirrus Logic |
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248 / 363 page  WM8994 248 Rev 4.6 REG NAME 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DEFAULT R54 (36h) Speaker Mixer 0 0 0 0 0 0 DAC2L _TO_S PKMIX L DAC2R _TO_S PKMIX R MIXINL _TO_S PKMIX L MIXIN R_TO_ SPKMI XR IN1LP_ TO_SP KMIXL IN1RP _TO_S PKMIX R MIXOU TL_TO _SPKM IXL MIXOU TR_TO _SPKM IXR DAC1L _TO_S PKMIX L DAC1R _TO_S PKMIX R 0000h R55 (37h) Additional Control 0 0 0 0 0 0 0 0 LINEO UT1_F B LINEO UT2_F B 0 0 0 0 0 VROI 0000h R56 (38h) AntiPOP (1) 0 0 0 0 0 0 0 0 LINEO UT_VM ID_BU F_ENA HPOU T2_IN_ ENA LINEO UT1_D ISCH LINEO UT2_D ISCH 0 0 0 0 0000h R57 (39h) AntiPOP (2) 0 0 0 0 0 0 0 MICB2 _DISC H MICB1 _DISC H VMID_RAMP [1:0] 0 VMID_ BUF_E NA START UP_BI AS_EN A BIAS_ SRC VMID_ DISCH 0000h R58 (3Ah) MICBIAS 0 0 0 0 0 0 0 0 MICD_SCTHR [1:0] MICD_THR [2:0] MICD_ ENA MICB2 _LVL MICB1 _LVL 0000h R59 (3Bh) LDO 1 0 0 0 0 0 0 0 0 0 0 0 0 LDO1_VSEL [2:0] LDO1_ DISCH 000Dh R60 (3Ch) LDO 2 0 0 0 0 0 0 0 0 0 0 0 0 0 LDO2_VSEL [1:0] LDO2_ DISCH 0003h R76 (4Ch) Charge Pump (1) CP_EN A 0 0 1 1 1 1 1 0 0 1 0 0 1 0 1 1F25h R77 (4Dh) Charge Pump (2) CP_DI SCH 0 1 0 1 0 1 1 0 0 0 1 1 0 0 1 AB19h R81 (51h) Class W (1) 0 0 0 0 0 0 CP_DYN_SRC_ SEL [1:0] 0 0 0 0 0 1 0 CP_DY N_PW R 0004h R84 (54h) DC Servo (1) 0 0 DCS_T RIG_SI NGLE_ 1 DCS_T RIG_SI NGLE_ 0 0 0 DCS_T RIG_S ERIES _1 DCS_T RIG_S ERIES _0 0 0 DCS_T RIG_S TARTU P_1 DCS_T RIG_S TARTU P_0 DCS_T RIG_D AC_W R_1 DCS_T RIG_D AC_W R_0 DCS_E NA_CH AN_1 DCS_E NA_CH AN_0 0000h R85 (55h) DC Servo (2) 0 0 0 0 DCS_SERIES_NO_01 [6:0] 0 DCS_TIMER_PERIOD_01 [3:0] 054Ah R88 (58h) DC Servo Readback 0 0 0 0 0 0 DCS_CAL_CO MPLETE [1:0] 0 0 DCS_DAC_WR _COMPLETE [1:0] 0 0 DCS_STARTUP _COMPLETE [1:0] 0000h R89 (59h) DC Servo (4) DCS_DAC_WR_VAL_1 [7:0] DCS_DAC_WR_VAL_0 [7:0] 0000h R96 (60h) Analogue HP (1) 0 0 0 0 0 0 0 0 HPOU T1L_R MV_S HORT HPOU T1L_O UTP HPOU T1L_D LY 0 HPOU T1R_R MV_S HORT HPOU T1R_O UTP HPOU T1R_D LY 0 0000h R256 (100h) Chip Revision 0 0 0 0 0 0 0 0 0 0 0 0 CHIP_REV [3:0] 000Xh R257 (101h) Control Interface 1 0 0 0 0 0 0 0 0 SPI_C ONTR D SPI_4 WIRE SPI_C FG 0 AUTO_ INC 0 0 8004h R272 (110h) Write Sequencer Ctrl (1) WSEQ _ENA 0 0 0 0 0 WSEQ _ABOR T WSEQ _STAR T 0 WSEQ_START_INDEX [6:0] 0000h R273 (111h) Write Sequencer Ctrl (2) 0 0 0 0 0 0 0 WSEQ _BUSY 0 WSEQ_CURRENT_INDEX [6:0] 0000h R512 (200h) AIF1 Clocking (1) 0 0 0 0 0 0 0 0 0 0 0 AIF1CLK_SRC [1:0] AIF1CL K_INV AIF1CL K_DIV AIF1CL K_ENA 0000h R513 (201h) AIF1 Clocking (2) 0 0 0 0 0 0 0 0 0 0 AIF1DAC_DIV [2:0] AIF1ADC_DIV [2:0] 0000h R516 (204h) AIF2 Clocking (1) 0 0 0 0 0 0 0 0 0 0 0 AIF2CLK_SRC [1:0] AIF2CL K_INV AIF2CL K_DIV AIF2CL K_ENA 0000h R517 (205h) AIF2 Clocking (2) 0 0 0 0 0 0 0 0 0 0 AIF2DAC_DIV [2:0] AIF2ADC_DIV [2:0] 0000h R520 (208h) Clocking (1) 0 0 0 0 0 0 0 0 0 0 0 TOCLK _ENA AIF1D SPCLK _ENA AIF2D SPCLK _ENA SYSDS PCLK_ ENA SYSCL K_SRC 0000h |
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