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CC1070-RTY1 数据表(PDF) 17 Page - Texas Instruments |
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CC1070-RTY1 数据表(HTML) 17 Page - Texas Instruments |
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17 / 57 page ![]() CC1070 SWRS043A Page 17 of 54 9 Microcontroller Interface Used in a typical system, CC1070 will interface to a microcontroller. This microcontroller must be able to: • Program CC1070 into different modes via the 4-wire serial configuration interface (PDI, PDO, PCLK and PSEL) • Interface to the synchronous data signal interface (DI and DCLK) • Optionally, the microcontroller can do data encoding • Optionally, the microcontroller can monitor the LOCK pin for frequency lock status or other status information. Configuration interface The microcontroller interface is shown in Figure 5. The microcontroller uses 3 or 4 I/O pins for the configuration interface (PDI, PDO, PCLK and PSEL). PDO should be connected to a microcontroller input. PDI, PCLK and PSEL must be microcontroller outputs. One I/O pin can be saved if PDI and PDO are connected together and a bi-directional pin is used at the microcontroller. The microcontroller pins connected to PDI, PDO and PCLK can be used for other purposes when the configuration interface is not used. PDI, PDO and PCLK are high impedance inputs as long as PSEL is not activated (active low). PSEL has an internal pull-up resistor and should be left open (tri-stated by the microcontroller) or set to a high level during power down mode in order to prevent a trickle current flowing in the pull- up. Signal interface The DI pin is used for data to be transmitted. DCLK providing the data timing should be connected to a microcontroller input. PLL lock signal Optionally, one microcontroller pin can be used to monitor the LOCK signal. This signal is at low logic level when the PLL is in lock. It can also be used to monitor other internal test signals. CC1070 PDI PCLK PSEL DI LOCK Micro- controller DCLK (Optional) PDO (Optional) CC1070 PDI PCLK PSEL DI LOCK Micro- controller DCLK (Optional) PDO (Optional) Figure 5. Microcontroller interface |
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