CC1070-RTY1 datasheet(42/57 Pages) TI2

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CC1070

SWRS043A

Page 42 of 54

MAIN Register (00h)

NAME

Default

value

Active

Description

MAIN[7]

reserved

MAIN[6]

F_REG

Selection of Frequency Register, 0: Register A, 1: Register B

MAIN[5:4]

PD_MODE[1:0]

Power down mode

0 (00): Normal operation

1 (01): PA in power-down.

2 (10): Individual modules can be put in power-down by

programming the POWERDOWN register

3 (11): reserved

MAIN[3]

FS_PD

Power Down of Frequency Synthesizer

MAIN[2]

XOSC_PD

Power Down of Crystal Oscillator Core

MAIN[1]

BIAS_PD

Power Down of BIAS (Global Current Generator)

and Crystal Oscillator Buffer

MAIN[0]

RESET_N

Reset, active low. Writing RESET_N low will write default values to

all other registers than MAIN. Bits in MAIN do not have a default

value and will be written directly through the configuration

interface. Must be set high to complete reset.

INTERFACE Register (01h)

NAME

Default

value

Active

Description

INTERFACE[7]

XOSC_BYPASS

Bypass internal crystal oscillator, use external clock

0: Internal crystal oscillator is used, or external sine wave fed

through a coupling capacitor

1: Internal crystal oscillator in power down, external clock

with rail-to-rail swing is used

INTERFACE[6]

reserved

INTERFACE[5]

DCLK_LOCK

Gate DCLK signal with PLL lock signal in synchronous mode

Only applies when PD_MODE = “01”

0: DCLK is always 1

1: DCLK is always 1 unless PLL is in lock

INTERFACE[4]

reserved

INTERFACE[3]

EXT_PA

Use PA_EN pin to control external PA

0: PA_EN pin always equals EXT_PA_POL bit

1: PA_EN pin is asserted when internal PA is turned on

INTERFACE[2]

reserved

INTERFACE[1]

EXT_PA_POL

Polarity of external PA control

0: PA_EN pin is “0” when activating external PA

1: PA_EN pin is “1” when activating external PA

INTERFACE[0]

reserved

RESET Register (02h)

NAME

Default

value

Active

Description

RESET[7]

reserved

RESET[6]

reserved

RESET[5]

GAUSS_RESET_N

Reset Gaussian data filter

RESET[4]

reserved

RESET[3]

PN9_RESET_N

Reset modulator and PN9 PRBS generator

RESET[2]

SYNTH_RESET_N

Reset digital part of frequency synthesizer

RESET[1]

reserved

RESET[0]

CAL_LOCK_RESET_N

Reset calibration logic and lock detector

Note: For reset of CC1070 write RESET_N=0 in the MAIN register. The RESET register should not be used

during normal operation

Bits in the RESET register are self-clearing (will be set to 1 when the reset operation starts). Relevant digital

clocks must be running for the resetting to complete. After writing to the RESET register, the user should

verify that all reset operations have been completed, by reading the RESET_DONE status register (41h)

until all bits equal 1.

CC1070-RTY1 数据表(PDF) 42 Page - Texas Instruments

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CC1070-RTY1 数据表(PDF) 42 Page - Texas Instruments

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