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ADS1675 数据表(PDF) 16 Page - Texas Instruments

部件名 ADS1675
功能描述  4MSPS, 24-Bit Analog-to-Digital Converter
PDF  40 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

ADS1675 数据表(HTML) 16 Page - Texas Instruments

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Full-scalerange
RMSnoise
ln(2)
ENOB=
ln
ADS1675
SBAS416D – DECEMBER 2008 – REVISED AUGUST 2010
www.ti.com
NOISE PERFORMANCE
Noise-free bits specifies noise, again from a dc
perspective using Equation 1, with peak-to-peak
The ADS1675 offers outstanding noise performance
noise substituted for RMS noise.
that can be optimized by adjusting the data rate. As
the averaging is increased (thus reducing the data
ANALOG INPUTS (AINP, AINN)
rate), the noise drops correspondingly. Table 1 shows
the noise as a function of data rate for both the
The
ADS1675
measures
the
differential
signal,
Low-Latency and the Wide-Bandwidth filter paths
VIN = (AINP – AINN), against the differential
under the conditions shown.
reference, VREF = (VREFP – VREFN). The most
positive measurable differential input is VREF, which
Table 1 lists some of the more common methods of
produces the most positive digital output code of
specifying noise. The dynamic range is the ratio of
7FFFFFh. Likewise, the most negative measurable
the root-mean-square (RMS) value of a full-scale sine
differential input is –VREF, which produces the most
wave to the RMS noise with the inputs shorted
negative digital output code of 800000h.
together. This value is expressed in decibels relative
to full-scale (dBFS). The input-referred noise is the
Analog inputs must be driven with a differential signal
RMS value of the noise with the inputs shorted,
to achieve optimum performance. The recommended
referred to the input of the ADS1675. The effective
common-mode
voltage
is
2.5V.
The
ADS1675
number of bits (ENOB) is calculated from a dc
samples the analog inputs at very high speeds. It is
perspective using the formula in Equation 1, where
critical that a suitable driver be used. See the
full-scale range equals 2VREF.
Application Information section for recommended
circuit designs.
(1)
Table 1. Noise Performance(1)
INPUT-
DATA RATE
DYNAMIC
REFERRED
NOISE-FREE
FILTER PATH
DATA RATE[2:0]
(kSPS)
RANGE (dB)
NOISE (mVRMS)
ENOB
BITS
000
125
111
6.30
19.86
17.14
001
250
109
7.47
19.61
16.89
Low-speed
Low-Latency
modes
010
500
107
9.51
19.27
16.54
(Fast Response
Mode
011
1000
105
11.72
18.97
16.24
configuration)
100
2000
104
13.72
18.74
16.02
High-speed
modes
101
4000
103
14.23
18.69
15.96
000
125
111
6.17
19.89
17.17
001
250
109
7.44
19.62
16.90
Low-speed
modes
010
500
107
9.66
19.25
16.52
Wide-Bandwidth
011
1000
104
12.99
18.82
16.09
100
2000
101
18.64
18.30
15.57
High-speed
modes
101
4000
94
44.02
17.06
14.33
(1)
VREF = 3V, fCLK = 32MHz.
16
Submit Documentation Feedback
Copyright © 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): ADS1675



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